esp32p4/lp_gpio/
func5_in_sel_cfg.rs

1#[doc = "Register `FUNC5_IN_SEL_CFG` reader"]
2pub type R = crate::R<FUNC5_IN_SEL_CFG_SPEC>;
3#[doc = "Register `FUNC5_IN_SEL_CFG` writer"]
4pub type W = crate::W<FUNC5_IN_SEL_CFG_SPEC>;
5#[doc = "Field `REG_GPIO_FUNC5_IN_INV_SEL` reader - Reserved"]
6pub type REG_GPIO_FUNC5_IN_INV_SEL_R = crate::BitReader;
7#[doc = "Field `REG_GPIO_FUNC5_IN_INV_SEL` writer - Reserved"]
8pub type REG_GPIO_FUNC5_IN_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `REG_GPIO_SIG5_IN_SEL` reader - Reserved"]
10pub type REG_GPIO_SIG5_IN_SEL_R = crate::BitReader;
11#[doc = "Field `REG_GPIO_SIG5_IN_SEL` writer - Reserved"]
12pub type REG_GPIO_SIG5_IN_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `REG_GPIO_FUNC5_IN_SEL` reader - Reserved"]
14pub type REG_GPIO_FUNC5_IN_SEL_R = crate::FieldReader;
15#[doc = "Field `REG_GPIO_FUNC5_IN_SEL` writer - Reserved"]
16pub type REG_GPIO_FUNC5_IN_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
17impl R {
18    #[doc = "Bit 0 - Reserved"]
19    #[inline(always)]
20    pub fn reg_gpio_func5_in_inv_sel(&self) -> REG_GPIO_FUNC5_IN_INV_SEL_R {
21        REG_GPIO_FUNC5_IN_INV_SEL_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Reserved"]
24    #[inline(always)]
25    pub fn reg_gpio_sig5_in_sel(&self) -> REG_GPIO_SIG5_IN_SEL_R {
26        REG_GPIO_SIG5_IN_SEL_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bits 2:7 - Reserved"]
29    #[inline(always)]
30    pub fn reg_gpio_func5_in_sel(&self) -> REG_GPIO_FUNC5_IN_SEL_R {
31        REG_GPIO_FUNC5_IN_SEL_R::new(((self.bits >> 2) & 0x3f) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("FUNC5_IN_SEL_CFG")
38            .field(
39                "reg_gpio_func5_in_inv_sel",
40                &format_args!("{}", self.reg_gpio_func5_in_inv_sel().bit()),
41            )
42            .field(
43                "reg_gpio_sig5_in_sel",
44                &format_args!("{}", self.reg_gpio_sig5_in_sel().bit()),
45            )
46            .field(
47                "reg_gpio_func5_in_sel",
48                &format_args!("{}", self.reg_gpio_func5_in_sel().bits()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<FUNC5_IN_SEL_CFG_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bit 0 - Reserved"]
61    #[inline(always)]
62    #[must_use]
63    pub fn reg_gpio_func5_in_inv_sel(
64        &mut self,
65    ) -> REG_GPIO_FUNC5_IN_INV_SEL_W<FUNC5_IN_SEL_CFG_SPEC> {
66        REG_GPIO_FUNC5_IN_INV_SEL_W::new(self, 0)
67    }
68    #[doc = "Bit 1 - Reserved"]
69    #[inline(always)]
70    #[must_use]
71    pub fn reg_gpio_sig5_in_sel(&mut self) -> REG_GPIO_SIG5_IN_SEL_W<FUNC5_IN_SEL_CFG_SPEC> {
72        REG_GPIO_SIG5_IN_SEL_W::new(self, 1)
73    }
74    #[doc = "Bits 2:7 - Reserved"]
75    #[inline(always)]
76    #[must_use]
77    pub fn reg_gpio_func5_in_sel(&mut self) -> REG_GPIO_FUNC5_IN_SEL_W<FUNC5_IN_SEL_CFG_SPEC> {
78        REG_GPIO_FUNC5_IN_SEL_W::new(self, 2)
79    }
80}
81#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func5_in_sel_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func5_in_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
82pub struct FUNC5_IN_SEL_CFG_SPEC;
83impl crate::RegisterSpec for FUNC5_IN_SEL_CFG_SPEC {
84    type Ux = u32;
85}
86#[doc = "`read()` method returns [`func5_in_sel_cfg::R`](R) reader structure"]
87impl crate::Readable for FUNC5_IN_SEL_CFG_SPEC {}
88#[doc = "`write(|w| ..)` method takes [`func5_in_sel_cfg::W`](W) writer structure"]
89impl crate::Writable for FUNC5_IN_SEL_CFG_SPEC {
90    type Safety = crate::Unsafe;
91    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
92    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
93}
94#[doc = "`reset()` method sets FUNC5_IN_SEL_CFG to value 0x80"]
95impl crate::Resettable for FUNC5_IN_SEL_CFG_SPEC {
96    const RESET_VALUE: u32 = 0x80;
97}
esp32p4/lp_gpio/func5_in_sel_cfg.rs

esp32p4/lp_gpio/
func5_in_sel_cfg.rs
