1#[doc = "Register `RX_CONF1` reader"]
2pub type R = crate::R<RX_CONF1_SPEC>;
3#[doc = "Register `RX_CONF1` writer"]
4pub type W = crate::W<RX_CONF1_SPEC>;
5#[doc = "Field `RX_TDM_WS_WIDTH` reader - The width of rx_ws_out at idle level in TDM mode is (I2S_RX_TDM_WS_WIDTH\\[8:0\\] +1) * T_bck"]
6pub type RX_TDM_WS_WIDTH_R = crate::FieldReader<u16>;
7#[doc = "Field `RX_TDM_WS_WIDTH` writer - The width of rx_ws_out at idle level in TDM mode is (I2S_RX_TDM_WS_WIDTH\\[8:0\\] +1) * T_bck"]
8pub type RX_TDM_WS_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `RX_BITS_MOD` reader - Set the bits to configure the valid data bit length of I2S receiver channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode."]
10pub type RX_BITS_MOD_R = crate::FieldReader;
11#[doc = "Field `RX_BITS_MOD` writer - Set the bits to configure the valid data bit length of I2S receiver channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode."]
12pub type RX_BITS_MOD_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
13#[doc = "Field `RX_HALF_SAMPLE_BITS` reader - I2S Rx half sample bits -1."]
14pub type RX_HALF_SAMPLE_BITS_R = crate::FieldReader;
15#[doc = "Field `RX_HALF_SAMPLE_BITS` writer - I2S Rx half sample bits -1."]
16pub type RX_HALF_SAMPLE_BITS_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
17#[doc = "Field `RX_TDM_CHAN_BITS` reader - The Rx bit number for each channel minus 1in TDM mode."]
18pub type RX_TDM_CHAN_BITS_R = crate::FieldReader;
19#[doc = "Field `RX_TDM_CHAN_BITS` writer - The Rx bit number for each channel minus 1in TDM mode."]
20pub type RX_TDM_CHAN_BITS_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
21impl R {
22 #[doc = "Bits 0:8 - The width of rx_ws_out at idle level in TDM mode is (I2S_RX_TDM_WS_WIDTH\\[8:0\\] +1) * T_bck"]
23 #[inline(always)]
24 pub fn rx_tdm_ws_width(&self) -> RX_TDM_WS_WIDTH_R {
25 RX_TDM_WS_WIDTH_R::new((self.bits & 0x01ff) as u16)
26 }
27 #[doc = "Bits 14:18 - Set the bits to configure the valid data bit length of I2S receiver channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode."]
28 #[inline(always)]
29 pub fn rx_bits_mod(&self) -> RX_BITS_MOD_R {
30 RX_BITS_MOD_R::new(((self.bits >> 14) & 0x1f) as u8)
31 }
32 #[doc = "Bits 19:26 - I2S Rx half sample bits -1."]
33 #[inline(always)]
34 pub fn rx_half_sample_bits(&self) -> RX_HALF_SAMPLE_BITS_R {
35 RX_HALF_SAMPLE_BITS_R::new(((self.bits >> 19) & 0xff) as u8)
36 }
37 #[doc = "Bits 27:31 - The Rx bit number for each channel minus 1in TDM mode."]
38 #[inline(always)]
39 pub fn rx_tdm_chan_bits(&self) -> RX_TDM_CHAN_BITS_R {
40 RX_TDM_CHAN_BITS_R::new(((self.bits >> 27) & 0x1f) as u8)
41 }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46 f.debug_struct("RX_CONF1")
47 .field(
48 "rx_tdm_ws_width",
49 &format_args!("{}", self.rx_tdm_ws_width().bits()),
50 )
51 .field(
52 "rx_bits_mod",
53 &format_args!("{}", self.rx_bits_mod().bits()),
54 )
55 .field(
56 "rx_half_sample_bits",
57 &format_args!("{}", self.rx_half_sample_bits().bits()),
58 )
59 .field(
60 "rx_tdm_chan_bits",
61 &format_args!("{}", self.rx_tdm_chan_bits().bits()),
62 )
63 .finish()
64 }
65}
66#[cfg(feature = "impl-register-debug")]
67impl core::fmt::Debug for crate::generic::Reg<RX_CONF1_SPEC> {
68 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
69 core::fmt::Debug::fmt(&self.read(), f)
70 }
71}
72impl W {
73 #[doc = "Bits 0:8 - The width of rx_ws_out at idle level in TDM mode is (I2S_RX_TDM_WS_WIDTH\\[8:0\\] +1) * T_bck"]
74 #[inline(always)]
75 #[must_use]
76 pub fn rx_tdm_ws_width(&mut self) -> RX_TDM_WS_WIDTH_W<RX_CONF1_SPEC> {
77 RX_TDM_WS_WIDTH_W::new(self, 0)
78 }
79 #[doc = "Bits 14:18 - Set the bits to configure the valid data bit length of I2S receiver channel. 7: all the valid channel data is in 8-bit-mode. 15: all the valid channel data is in 16-bit-mode. 23: all the valid channel data is in 24-bit-mode. 31:all the valid channel data is in 32-bit-mode."]
80 #[inline(always)]
81 #[must_use]
82 pub fn rx_bits_mod(&mut self) -> RX_BITS_MOD_W<RX_CONF1_SPEC> {
83 RX_BITS_MOD_W::new(self, 14)
84 }
85 #[doc = "Bits 19:26 - I2S Rx half sample bits -1."]
86 #[inline(always)]
87 #[must_use]
88 pub fn rx_half_sample_bits(&mut self) -> RX_HALF_SAMPLE_BITS_W<RX_CONF1_SPEC> {
89 RX_HALF_SAMPLE_BITS_W::new(self, 19)
90 }
91 #[doc = "Bits 27:31 - The Rx bit number for each channel minus 1in TDM mode."]
92 #[inline(always)]
93 #[must_use]
94 pub fn rx_tdm_chan_bits(&mut self) -> RX_TDM_CHAN_BITS_W<RX_CONF1_SPEC> {
95 RX_TDM_CHAN_BITS_W::new(self, 27)
96 }
97}
98#[doc = "I2S RX configure register 1\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_conf1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rx_conf1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
99pub struct RX_CONF1_SPEC;
100impl crate::RegisterSpec for RX_CONF1_SPEC {
101 type Ux = u32;
102}
103#[doc = "`read()` method returns [`rx_conf1::R`](R) reader structure"]
104impl crate::Readable for RX_CONF1_SPEC {}
105#[doc = "`write(|w| ..)` method takes [`rx_conf1::W`](W) writer structure"]
106impl crate::Writable for RX_CONF1_SPEC {
107 type Safety = crate::Unsafe;
108 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
109 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
110}
111#[doc = "`reset()` method sets RX_CONF1 to value 0x787b_c000"]
112impl crate::Resettable for RX_CONF1_SPEC {
113 const RESET_VALUE: u32 = 0x787b_c000;
114}