esp32p4/hp_sys/
l2_mem_int_record1.rs

1#[doc = "Register `L2_MEM_INT_RECORD1` reader"]
2pub type R = crate::R<L2_MEM_INT_RECORD1_SPEC>;
3#[doc = "Field `REG_L2_MEM_ECC_ERR_INT_ADDR` reader - NA"]
4pub type REG_L2_MEM_ECC_ERR_INT_ADDR_R = crate::FieldReader<u16>;
5#[doc = "Field `REG_L2_MEM_ECC_ONE_BIT_ERR` reader - NA"]
6pub type REG_L2_MEM_ECC_ONE_BIT_ERR_R = crate::BitReader;
7#[doc = "Field `REG_L2_MEM_ECC_TWO_BIT_ERR` reader - NA"]
8pub type REG_L2_MEM_ECC_TWO_BIT_ERR_R = crate::BitReader;
9#[doc = "Field `REG_L2_MEM_ECC_ERR_BIT` reader - NA"]
10pub type REG_L2_MEM_ECC_ERR_BIT_R = crate::FieldReader<u16>;
11#[doc = "Field `REG_L2_CACHE_ERR_BANK` reader - NA"]
12pub type REG_L2_CACHE_ERR_BANK_R = crate::BitReader;
13impl R {
14    #[doc = "Bits 0:14 - NA"]
15    #[inline(always)]
16    pub fn reg_l2_mem_ecc_err_int_addr(&self) -> REG_L2_MEM_ECC_ERR_INT_ADDR_R {
17        REG_L2_MEM_ECC_ERR_INT_ADDR_R::new((self.bits & 0x7fff) as u16)
18    }
19    #[doc = "Bit 15 - NA"]
20    #[inline(always)]
21    pub fn reg_l2_mem_ecc_one_bit_err(&self) -> REG_L2_MEM_ECC_ONE_BIT_ERR_R {
22        REG_L2_MEM_ECC_ONE_BIT_ERR_R::new(((self.bits >> 15) & 1) != 0)
23    }
24    #[doc = "Bit 16 - NA"]
25    #[inline(always)]
26    pub fn reg_l2_mem_ecc_two_bit_err(&self) -> REG_L2_MEM_ECC_TWO_BIT_ERR_R {
27        REG_L2_MEM_ECC_TWO_BIT_ERR_R::new(((self.bits >> 16) & 1) != 0)
28    }
29    #[doc = "Bits 17:25 - NA"]
30    #[inline(always)]
31    pub fn reg_l2_mem_ecc_err_bit(&self) -> REG_L2_MEM_ECC_ERR_BIT_R {
32        REG_L2_MEM_ECC_ERR_BIT_R::new(((self.bits >> 17) & 0x01ff) as u16)
33    }
34    #[doc = "Bit 26 - NA"]
35    #[inline(always)]
36    pub fn reg_l2_cache_err_bank(&self) -> REG_L2_CACHE_ERR_BANK_R {
37        REG_L2_CACHE_ERR_BANK_R::new(((self.bits >> 26) & 1) != 0)
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for R {
42    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
43        f.debug_struct("L2_MEM_INT_RECORD1")
44            .field(
45                "reg_l2_mem_ecc_err_int_addr",
46                &format_args!("{}", self.reg_l2_mem_ecc_err_int_addr().bits()),
47            )
48            .field(
49                "reg_l2_mem_ecc_one_bit_err",
50                &format_args!("{}", self.reg_l2_mem_ecc_one_bit_err().bit()),
51            )
52            .field(
53                "reg_l2_mem_ecc_two_bit_err",
54                &format_args!("{}", self.reg_l2_mem_ecc_two_bit_err().bit()),
55            )
56            .field(
57                "reg_l2_mem_ecc_err_bit",
58                &format_args!("{}", self.reg_l2_mem_ecc_err_bit().bits()),
59            )
60            .field(
61                "reg_l2_cache_err_bank",
62                &format_args!("{}", self.reg_l2_cache_err_bank().bit()),
63            )
64            .finish()
65    }
66}
67#[cfg(feature = "impl-register-debug")]
68impl core::fmt::Debug for crate::generic::Reg<L2_MEM_INT_RECORD1_SPEC> {
69    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
70        core::fmt::Debug::fmt(&self.read(), f)
71    }
72}
73#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_record1::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
74pub struct L2_MEM_INT_RECORD1_SPEC;
75impl crate::RegisterSpec for L2_MEM_INT_RECORD1_SPEC {
76    type Ux = u32;
77}
78#[doc = "`read()` method returns [`l2_mem_int_record1::R`](R) reader structure"]
79impl crate::Readable for L2_MEM_INT_RECORD1_SPEC {}
80#[doc = "`reset()` method sets L2_MEM_INT_RECORD1 to value 0"]
81impl crate::Resettable for L2_MEM_INT_RECORD1_SPEC {
82    const RESET_VALUE: u32 = 0;
83}
esp32p4/hp_sys/l2_mem_int_record1.rs

esp32p4/hp_sys/
l2_mem_int_record1.rs
