esp32p4/hp_sys/
l2_mem_int_ena.rs

1#[doc = "Register `L2_MEM_INT_ENA` reader"]
2pub type R = crate::R<L2_MEM_INT_ENA_SPEC>;
3#[doc = "Register `L2_MEM_INT_ENA` writer"]
4pub type W = crate::W<L2_MEM_INT_ENA_SPEC>;
5#[doc = "Field `REG_L2_MEM_ECC_ERR_INT_ENA` reader - NA"]
6pub type REG_L2_MEM_ECC_ERR_INT_ENA_R = crate::BitReader;
7#[doc = "Field `REG_L2_MEM_ECC_ERR_INT_ENA` writer - NA"]
8pub type REG_L2_MEM_ECC_ERR_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `REG_L2_MEM_EXCEED_ADDR_INT_ENA` reader - NA"]
10pub type REG_L2_MEM_EXCEED_ADDR_INT_ENA_R = crate::BitReader;
11#[doc = "Field `REG_L2_MEM_EXCEED_ADDR_INT_ENA` writer - NA"]
12pub type REG_L2_MEM_EXCEED_ADDR_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `REG_L2_MEM_ERR_RESP_INT_ENA` reader - NA"]
14pub type REG_L2_MEM_ERR_RESP_INT_ENA_R = crate::BitReader;
15#[doc = "Field `REG_L2_MEM_ERR_RESP_INT_ENA` writer - NA"]
16pub type REG_L2_MEM_ERR_RESP_INT_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - NA"]
19    #[inline(always)]
20    pub fn reg_l2_mem_ecc_err_int_ena(&self) -> REG_L2_MEM_ECC_ERR_INT_ENA_R {
21        REG_L2_MEM_ECC_ERR_INT_ENA_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - NA"]
24    #[inline(always)]
25    pub fn reg_l2_mem_exceed_addr_int_ena(&self) -> REG_L2_MEM_EXCEED_ADDR_INT_ENA_R {
26        REG_L2_MEM_EXCEED_ADDR_INT_ENA_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - NA"]
29    #[inline(always)]
30    pub fn reg_l2_mem_err_resp_int_ena(&self) -> REG_L2_MEM_ERR_RESP_INT_ENA_R {
31        REG_L2_MEM_ERR_RESP_INT_ENA_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("L2_MEM_INT_ENA")
38            .field(
39                "reg_l2_mem_ecc_err_int_ena",
40                &format_args!("{}", self.reg_l2_mem_ecc_err_int_ena().bit()),
41            )
42            .field(
43                "reg_l2_mem_exceed_addr_int_ena",
44                &format_args!("{}", self.reg_l2_mem_exceed_addr_int_ena().bit()),
45            )
46            .field(
47                "reg_l2_mem_err_resp_int_ena",
48                &format_args!("{}", self.reg_l2_mem_err_resp_int_ena().bit()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<L2_MEM_INT_ENA_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bit 0 - NA"]
61    #[inline(always)]
62    #[must_use]
63    pub fn reg_l2_mem_ecc_err_int_ena(
64        &mut self,
65    ) -> REG_L2_MEM_ECC_ERR_INT_ENA_W<L2_MEM_INT_ENA_SPEC> {
66        REG_L2_MEM_ECC_ERR_INT_ENA_W::new(self, 0)
67    }
68    #[doc = "Bit 1 - NA"]
69    #[inline(always)]
70    #[must_use]
71    pub fn reg_l2_mem_exceed_addr_int_ena(
72        &mut self,
73    ) -> REG_L2_MEM_EXCEED_ADDR_INT_ENA_W<L2_MEM_INT_ENA_SPEC> {
74        REG_L2_MEM_EXCEED_ADDR_INT_ENA_W::new(self, 1)
75    }
76    #[doc = "Bit 2 - NA"]
77    #[inline(always)]
78    #[must_use]
79    pub fn reg_l2_mem_err_resp_int_ena(
80        &mut self,
81    ) -> REG_L2_MEM_ERR_RESP_INT_ENA_W<L2_MEM_INT_ENA_SPEC> {
82        REG_L2_MEM_ERR_RESP_INT_ENA_W::new(self, 2)
83    }
84}
85#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_mem_int_ena::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l2_mem_int_ena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
86pub struct L2_MEM_INT_ENA_SPEC;
87impl crate::RegisterSpec for L2_MEM_INT_ENA_SPEC {
88    type Ux = u32;
89}
90#[doc = "`read()` method returns [`l2_mem_int_ena::R`](R) reader structure"]
91impl crate::Readable for L2_MEM_INT_ENA_SPEC {}
92#[doc = "`write(|w| ..)` method takes [`l2_mem_int_ena::W`](W) writer structure"]
93impl crate::Writable for L2_MEM_INT_ENA_SPEC {
94    type Safety = crate::Unsafe;
95    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
96    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
97}
98#[doc = "`reset()` method sets L2_MEM_INT_ENA to value 0"]
99impl crate::Resettable for L2_MEM_INT_ENA_SPEC {
100    const RESET_VALUE: u32 = 0;
101}
esp32p4/hp_sys/l2_mem_int_ena.rs

esp32p4/hp_sys/
l2_mem_int_ena.rs
