esp32p4/hp_sys/
ahb2axi_bresp_err_int_st.rs

1#[doc = "Register `AHB2AXI_BRESP_ERR_INT_ST` reader"]
2pub type R = crate::R<AHB2AXI_BRESP_ERR_INT_ST_SPEC>;
3#[doc = "Field `CPU_ICM_H2X_BRESP_ERR_INT_ST` reader - the masked interrupt status of cpu_icm_h2x_bresp_err"]
4pub type CPU_ICM_H2X_BRESP_ERR_INT_ST_R = crate::BitReader;
5impl R {
6    #[doc = "Bit 31 - the masked interrupt status of cpu_icm_h2x_bresp_err"]
7    #[inline(always)]
8    pub fn cpu_icm_h2x_bresp_err_int_st(&self) -> CPU_ICM_H2X_BRESP_ERR_INT_ST_R {
9        CPU_ICM_H2X_BRESP_ERR_INT_ST_R::new(((self.bits >> 31) & 1) != 0)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("AHB2AXI_BRESP_ERR_INT_ST")
16            .field(
17                "cpu_icm_h2x_bresp_err_int_st",
18                &format_args!("{}", self.cpu_icm_h2x_bresp_err_int_st().bit()),
19            )
20            .finish()
21    }
22}
23#[cfg(feature = "impl-register-debug")]
24impl core::fmt::Debug for crate::generic::Reg<AHB2AXI_BRESP_ERR_INT_ST_SPEC> {
25    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
26        core::fmt::Debug::fmt(&self.read(), f)
27    }
28}
29#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`ahb2axi_bresp_err_int_st::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct AHB2AXI_BRESP_ERR_INT_ST_SPEC;
31impl crate::RegisterSpec for AHB2AXI_BRESP_ERR_INT_ST_SPEC {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`ahb2axi_bresp_err_int_st::R`](R) reader structure"]
35impl crate::Readable for AHB2AXI_BRESP_ERR_INT_ST_SPEC {}
36#[doc = "`reset()` method sets AHB2AXI_BRESP_ERR_INT_ST to value 0"]
37impl crate::Resettable for AHB2AXI_BRESP_ERR_INT_ST_SPEC {
38    const RESET_VALUE: u32 = 0;
39}
esp32p4/hp_sys/ahb2axi_bresp_err_int_st.rs

esp32p4/hp_sys/
ahb2axi_bresp_err_int_st.rs
