esp32p4/efuse/
rd_repeat_data0.rs

1#[doc = "Register `RD_REPEAT_DATA0` reader"]
2pub type R = crate::R<RD_REPEAT_DATA0_SPEC>;
3#[doc = "Field `RD_DIS` reader - Represents whether reading of individual eFuse block(block4~block10) is disabled or enabled. 1: disabled. 0: enabled."]
4pub type RD_DIS_R = crate::FieldReader;
5#[doc = "Field `USB_DEVICE_EXCHG_PINS` reader - Enable usb device exchange pins of D+ and D-."]
6pub type USB_DEVICE_EXCHG_PINS_R = crate::BitReader;
7#[doc = "Field `USB_OTG11_EXCHG_PINS` reader - Enable usb otg11 exchange pins of D+ and D-."]
8pub type USB_OTG11_EXCHG_PINS_R = crate::BitReader;
9#[doc = "Field `DIS_USB_JTAG` reader - Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled."]
10pub type DIS_USB_JTAG_R = crate::BitReader;
11#[doc = "Field `POWERGLITCH_EN` reader - Represents whether power glitch function is enabled. 1: enabled. 0: disabled."]
12pub type POWERGLITCH_EN_R = crate::BitReader;
13#[doc = "Field `DIS_USB_SERIAL_JTAG` reader - Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled."]
14pub type DIS_USB_SERIAL_JTAG_R = crate::BitReader;
15#[doc = "Field `DIS_FORCE_DOWNLOAD` reader - Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled."]
16pub type DIS_FORCE_DOWNLOAD_R = crate::BitReader;
17#[doc = "Field `SPI_DOWNLOAD_MSPI_DIS` reader - Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download."]
18pub type SPI_DOWNLOAD_MSPI_DIS_R = crate::BitReader;
19#[doc = "Field `DIS_TWAI` reader - Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled."]
20pub type DIS_TWAI_R = crate::BitReader;
21#[doc = "Field `JTAG_SEL_ENABLE` reader - Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled."]
22pub type JTAG_SEL_ENABLE_R = crate::BitReader;
23#[doc = "Field `SOFT_DIS_JTAG` reader - Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled."]
24pub type SOFT_DIS_JTAG_R = crate::FieldReader;
25#[doc = "Field `DIS_PAD_JTAG` reader - Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled."]
26pub type DIS_PAD_JTAG_R = crate::BitReader;
27#[doc = "Field `DIS_DOWNLOAD_MANUAL_ENCRYPT` reader - Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled."]
28pub type DIS_DOWNLOAD_MANUAL_ENCRYPT_R = crate::BitReader;
29#[doc = "Field `USB_DEVICE_DREFH` reader - USB intphy of usb device signle-end input high threshold, 1.76V to 2V. Step by 80mV"]
30pub type USB_DEVICE_DREFH_R = crate::FieldReader;
31#[doc = "Field `USB_OTG11_DREFH` reader - USB intphy of usb otg11 signle-end input high threshold, 1.76V to 2V. Step by 80mV"]
32pub type USB_OTG11_DREFH_R = crate::FieldReader;
33#[doc = "Field `USB_PHY_SEL` reader - TBD"]
34pub type USB_PHY_SEL_R = crate::BitReader;
35#[doc = "Field `KM_HUK_GEN_STATE_LOW` reader - Set this bit to control validation of HUK generate mode. Odd of 1 is invalid, even of 1 is valid."]
36pub type KM_HUK_GEN_STATE_LOW_R = crate::FieldReader;
37impl R {
38    #[doc = "Bits 0:6 - Represents whether reading of individual eFuse block(block4~block10) is disabled or enabled. 1: disabled. 0: enabled."]
39    #[inline(always)]
40    pub fn rd_dis(&self) -> RD_DIS_R {
41        RD_DIS_R::new((self.bits & 0x7f) as u8)
42    }
43    #[doc = "Bit 7 - Enable usb device exchange pins of D+ and D-."]
44    #[inline(always)]
45    pub fn usb_device_exchg_pins(&self) -> USB_DEVICE_EXCHG_PINS_R {
46        USB_DEVICE_EXCHG_PINS_R::new(((self.bits >> 7) & 1) != 0)
47    }
48    #[doc = "Bit 8 - Enable usb otg11 exchange pins of D+ and D-."]
49    #[inline(always)]
50    pub fn usb_otg11_exchg_pins(&self) -> USB_OTG11_EXCHG_PINS_R {
51        USB_OTG11_EXCHG_PINS_R::new(((self.bits >> 8) & 1) != 0)
52    }
53    #[doc = "Bit 9 - Represents whether the function of usb switch to jtag is disabled or enabled. 1: disabled. 0: enabled."]
54    #[inline(always)]
55    pub fn dis_usb_jtag(&self) -> DIS_USB_JTAG_R {
56        DIS_USB_JTAG_R::new(((self.bits >> 9) & 1) != 0)
57    }
58    #[doc = "Bit 10 - Represents whether power glitch function is enabled. 1: enabled. 0: disabled."]
59    #[inline(always)]
60    pub fn powerglitch_en(&self) -> POWERGLITCH_EN_R {
61        POWERGLITCH_EN_R::new(((self.bits >> 10) & 1) != 0)
62    }
63    #[doc = "Bit 11 - Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0: enabled."]
64    #[inline(always)]
65    pub fn dis_usb_serial_jtag(&self) -> DIS_USB_SERIAL_JTAG_R {
66        DIS_USB_SERIAL_JTAG_R::new(((self.bits >> 11) & 1) != 0)
67    }
68    #[doc = "Bit 12 - Represents whether the function that forces chip into download mode is disabled or enabled. 1: disabled. 0: enabled."]
69    #[inline(always)]
70    pub fn dis_force_download(&self) -> DIS_FORCE_DOWNLOAD_R {
71        DIS_FORCE_DOWNLOAD_R::new(((self.bits >> 12) & 1) != 0)
72    }
73    #[doc = "Bit 13 - Set this bit to disable accessing MSPI flash/MSPI ram by SYS AXI matrix during boot_mode_download."]
74    #[inline(always)]
75    pub fn spi_download_mspi_dis(&self) -> SPI_DOWNLOAD_MSPI_DIS_R {
76        SPI_DOWNLOAD_MSPI_DIS_R::new(((self.bits >> 13) & 1) != 0)
77    }
78    #[doc = "Bit 14 - Represents whether TWAI function is disabled or enabled. 1: disabled. 0: enabled."]
79    #[inline(always)]
80    pub fn dis_twai(&self) -> DIS_TWAI_R {
81        DIS_TWAI_R::new(((self.bits >> 14) & 1) != 0)
82    }
83    #[doc = "Bit 15 - Represents whether the selection between usb_to_jtag and pad_to_jtag through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are equal to 0 is enabled or disabled. 1: enabled. 0: disabled."]
84    #[inline(always)]
85    pub fn jtag_sel_enable(&self) -> JTAG_SEL_ENABLE_R {
86        JTAG_SEL_ENABLE_R::new(((self.bits >> 15) & 1) != 0)
87    }
88    #[doc = "Bits 16:18 - Represents whether JTAG is disabled in soft way. Odd number: disabled. Even number: enabled."]
89    #[inline(always)]
90    pub fn soft_dis_jtag(&self) -> SOFT_DIS_JTAG_R {
91        SOFT_DIS_JTAG_R::new(((self.bits >> 16) & 7) as u8)
92    }
93    #[doc = "Bit 19 - Represents whether JTAG is disabled in the hard way(permanently). 1: disabled. 0: enabled."]
94    #[inline(always)]
95    pub fn dis_pad_jtag(&self) -> DIS_PAD_JTAG_R {
96        DIS_PAD_JTAG_R::new(((self.bits >> 19) & 1) != 0)
97    }
98    #[doc = "Bit 20 - Represents whether flash encrypt function is disabled or enabled(except in SPI boot mode). 1: disabled. 0: enabled."]
99    #[inline(always)]
100    pub fn dis_download_manual_encrypt(&self) -> DIS_DOWNLOAD_MANUAL_ENCRYPT_R {
101        DIS_DOWNLOAD_MANUAL_ENCRYPT_R::new(((self.bits >> 20) & 1) != 0)
102    }
103    #[doc = "Bits 21:22 - USB intphy of usb device signle-end input high threshold, 1.76V to 2V. Step by 80mV"]
104    #[inline(always)]
105    pub fn usb_device_drefh(&self) -> USB_DEVICE_DREFH_R {
106        USB_DEVICE_DREFH_R::new(((self.bits >> 21) & 3) as u8)
107    }
108    #[doc = "Bits 23:24 - USB intphy of usb otg11 signle-end input high threshold, 1.76V to 2V. Step by 80mV"]
109    #[inline(always)]
110    pub fn usb_otg11_drefh(&self) -> USB_OTG11_DREFH_R {
111        USB_OTG11_DREFH_R::new(((self.bits >> 23) & 3) as u8)
112    }
113    #[doc = "Bit 25 - TBD"]
114    #[inline(always)]
115    pub fn usb_phy_sel(&self) -> USB_PHY_SEL_R {
116        USB_PHY_SEL_R::new(((self.bits >> 25) & 1) != 0)
117    }
118    #[doc = "Bits 26:31 - Set this bit to control validation of HUK generate mode. Odd of 1 is invalid, even of 1 is valid."]
119    #[inline(always)]
120    pub fn km_huk_gen_state_low(&self) -> KM_HUK_GEN_STATE_LOW_R {
121        KM_HUK_GEN_STATE_LOW_R::new(((self.bits >> 26) & 0x3f) as u8)
122    }
123}
124#[cfg(feature = "impl-register-debug")]
125impl core::fmt::Debug for R {
126    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
127        f.debug_struct("RD_REPEAT_DATA0")
128            .field("rd_dis", &format_args!("{}", self.rd_dis().bits()))
129            .field(
130                "usb_device_exchg_pins",
131                &format_args!("{}", self.usb_device_exchg_pins().bit()),
132            )
133            .field(
134                "usb_otg11_exchg_pins",
135                &format_args!("{}", self.usb_otg11_exchg_pins().bit()),
136            )
137            .field(
138                "dis_usb_jtag",
139                &format_args!("{}", self.dis_usb_jtag().bit()),
140            )
141            .field(
142                "powerglitch_en",
143                &format_args!("{}", self.powerglitch_en().bit()),
144            )
145            .field(
146                "dis_usb_serial_jtag",
147                &format_args!("{}", self.dis_usb_serial_jtag().bit()),
148            )
149            .field(
150                "dis_force_download",
151                &format_args!("{}", self.dis_force_download().bit()),
152            )
153            .field(
154                "spi_download_mspi_dis",
155                &format_args!("{}", self.spi_download_mspi_dis().bit()),
156            )
157            .field("dis_twai", &format_args!("{}", self.dis_twai().bit()))
158            .field(
159                "jtag_sel_enable",
160                &format_args!("{}", self.jtag_sel_enable().bit()),
161            )
162            .field(
163                "soft_dis_jtag",
164                &format_args!("{}", self.soft_dis_jtag().bits()),
165            )
166            .field(
167                "dis_pad_jtag",
168                &format_args!("{}", self.dis_pad_jtag().bit()),
169            )
170            .field(
171                "dis_download_manual_encrypt",
172                &format_args!("{}", self.dis_download_manual_encrypt().bit()),
173            )
174            .field(
175                "usb_device_drefh",
176                &format_args!("{}", self.usb_device_drefh().bits()),
177            )
178            .field(
179                "usb_otg11_drefh",
180                &format_args!("{}", self.usb_otg11_drefh().bits()),
181            )
182            .field("usb_phy_sel", &format_args!("{}", self.usb_phy_sel().bit()))
183            .field(
184                "km_huk_gen_state_low",
185                &format_args!("{}", self.km_huk_gen_state_low().bits()),
186            )
187            .finish()
188    }
189}
190#[cfg(feature = "impl-register-debug")]
191impl core::fmt::Debug for crate::generic::Reg<RD_REPEAT_DATA0_SPEC> {
192    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
193        core::fmt::Debug::fmt(&self.read(), f)
194    }
195}
196#[doc = "BLOCK0 data register 1.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rd_repeat_data0::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
197pub struct RD_REPEAT_DATA0_SPEC;
198impl crate::RegisterSpec for RD_REPEAT_DATA0_SPEC {
199    type Ux = u32;
200}
201#[doc = "`read()` method returns [`rd_repeat_data0::R`](R) reader structure"]
202impl crate::Readable for RD_REPEAT_DATA0_SPEC {}
203#[doc = "`reset()` method sets RD_REPEAT_DATA0 to value 0"]
204impl crate::Resettable for RD_REPEAT_DATA0_SPEC {
205    const RESET_VALUE: u32 = 0;
206}