esp32p4/dma/ch/
intsignal_enable1.rs1#[doc = "Register `INTSIGNAL_ENABLE1` reader"]
2pub type R = crate::R<INTSIGNAL_ENABLE1_SPEC>;
3#[doc = "Field `CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSIGNAL` reader - NA"]
4pub type CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSIGNAL_R = crate::BitReader;
5#[doc = "Field `CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSIGNAL` reader - NA"]
6pub type CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSIGNAL_R = crate::BitReader;
7#[doc = "Field `CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSIGNAL` reader - NA"]
8pub type CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSIGNAL_R = crate::BitReader;
9#[doc = "Field `CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSIGNAL` reader - NA"]
10pub type CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSIGNAL_R = crate::BitReader;
11impl R {
12 #[doc = "Bit 0 - NA"]
13 #[inline(always)]
14 pub fn ch1_enable_ecc_prot_chmem_correrr_intsignal(
15 &self,
16 ) -> CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSIGNAL_R {
17 CH1_ENABLE_ECC_PROT_CHMEM_CORRERR_INTSIGNAL_R::new((self.bits & 1) != 0)
18 }
19 #[doc = "Bit 1 - NA"]
20 #[inline(always)]
21 pub fn ch1_enable_ecc_prot_chmem_uncorrerr_intsignal(
22 &self,
23 ) -> CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSIGNAL_R {
24 CH1_ENABLE_ECC_PROT_CHMEM_UNCORRERR_INTSIGNAL_R::new(((self.bits >> 1) & 1) != 0)
25 }
26 #[doc = "Bit 2 - NA"]
27 #[inline(always)]
28 pub fn ch1_enable_ecc_prot_uidmem_correrr_intsignal(
29 &self,
30 ) -> CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSIGNAL_R {
31 CH1_ENABLE_ECC_PROT_UIDMEM_CORRERR_INTSIGNAL_R::new(((self.bits >> 2) & 1) != 0)
32 }
33 #[doc = "Bit 3 - NA"]
34 #[inline(always)]
35 pub fn ch1_enable_ecc_prot_uidmem_uncorrerr_intsignal(
36 &self,
37 ) -> CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSIGNAL_R {
38 CH1_ENABLE_ECC_PROT_UIDMEM_UNCORRERR_INTSIGNAL_R::new(((self.bits >> 3) & 1) != 0)
39 }
40}
41#[cfg(feature = "impl-register-debug")]
42impl core::fmt::Debug for R {
43 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
44 f.debug_struct("INTSIGNAL_ENABLE1")
45 .field(
46 "ch1_enable_ecc_prot_chmem_correrr_intsignal",
47 &format_args!(
48 "{}",
49 self.ch1_enable_ecc_prot_chmem_correrr_intsignal().bit()
50 ),
51 )
52 .field(
53 "ch1_enable_ecc_prot_chmem_uncorrerr_intsignal",
54 &format_args!(
55 "{}",
56 self.ch1_enable_ecc_prot_chmem_uncorrerr_intsignal().bit()
57 ),
58 )
59 .field(
60 "ch1_enable_ecc_prot_uidmem_correrr_intsignal",
61 &format_args!(
62 "{}",
63 self.ch1_enable_ecc_prot_uidmem_correrr_intsignal().bit()
64 ),
65 )
66 .field(
67 "ch1_enable_ecc_prot_uidmem_uncorrerr_intsignal",
68 &format_args!(
69 "{}",
70 self.ch1_enable_ecc_prot_uidmem_uncorrerr_intsignal().bit()
71 ),
72 )
73 .finish()
74 }
75}
76#[cfg(feature = "impl-register-debug")]
77impl core::fmt::Debug for crate::generic::Reg<INTSIGNAL_ENABLE1_SPEC> {
78 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
79 core::fmt::Debug::fmt(&self.read(), f)
80 }
81}
82#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`intsignal_enable1::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
83pub struct INTSIGNAL_ENABLE1_SPEC;
84impl crate::RegisterSpec for INTSIGNAL_ENABLE1_SPEC {
85 type Ux = u32;
86}
87#[doc = "`read()` method returns [`intsignal_enable1::R`](R) reader structure"]
88impl crate::Readable for INTSIGNAL_ENABLE1_SPEC {}
89#[doc = "`reset()` method sets INTSIGNAL_ENABLE1 to value 0x0f"]
90impl crate::Resettable for INTSIGNAL_ENABLE1_SPEC {
91 const RESET_VALUE: u32 = 0x0f;
92}