1#[doc = "Register `CFG1` reader"]
2pub type R = crate::R<CFG1_SPEC>;
3#[doc = "Register `CFG1` writer"]
4pub type W = crate::W<CFG1_SPEC>;
5#[doc = "Field `CH1_TT_FC` reader - NA"]
6pub type CH1_TT_FC_R = crate::FieldReader;
7#[doc = "Field `CH1_TT_FC` writer - NA"]
8pub type CH1_TT_FC_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
9#[doc = "Field `CH1_HS_SEL_SRC` reader - NA"]
10pub type CH1_HS_SEL_SRC_R = crate::BitReader;
11#[doc = "Field `CH1_HS_SEL_SRC` writer - NA"]
12pub type CH1_HS_SEL_SRC_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `CH1_HS_SEL_DST` reader - NA"]
14pub type CH1_HS_SEL_DST_R = crate::BitReader;
15#[doc = "Field `CH1_HS_SEL_DST` writer - NA"]
16pub type CH1_HS_SEL_DST_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CH1_SRC_HWHS_POL` reader - NA"]
18pub type CH1_SRC_HWHS_POL_R = crate::BitReader;
19#[doc = "Field `CH1_DST_HWHS_POL` reader - NA"]
20pub type CH1_DST_HWHS_POL_R = crate::BitReader;
21#[doc = "Field `CH1_SRC_PER` reader - NA"]
22pub type CH1_SRC_PER_R = crate::FieldReader;
23#[doc = "Field `CH1_SRC_PER` writer - NA"]
24pub type CH1_SRC_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
25#[doc = "Field `CH1_DST_PER` reader - NA"]
26pub type CH1_DST_PER_R = crate::FieldReader;
27#[doc = "Field `CH1_DST_PER` writer - NA"]
28pub type CH1_DST_PER_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `CH1_CH_PRIOR` reader - NA"]
30pub type CH1_CH_PRIOR_R = crate::FieldReader;
31#[doc = "Field `CH1_CH_PRIOR` writer - NA"]
32pub type CH1_CH_PRIOR_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
33#[doc = "Field `CH1_LOCK_CH` reader - NA"]
34pub type CH1_LOCK_CH_R = crate::BitReader;
35#[doc = "Field `CH1_LOCK_CH_L` reader - NA"]
36pub type CH1_LOCK_CH_L_R = crate::FieldReader;
37#[doc = "Field `CH1_SRC_OSR_LMT` reader - NA"]
38pub type CH1_SRC_OSR_LMT_R = crate::FieldReader;
39#[doc = "Field `CH1_SRC_OSR_LMT` writer - NA"]
40pub type CH1_SRC_OSR_LMT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
41#[doc = "Field `CH1_DST_OSR_LMT` reader - NA"]
42pub type CH1_DST_OSR_LMT_R = crate::FieldReader;
43#[doc = "Field `CH1_DST_OSR_LMT` writer - NA"]
44pub type CH1_DST_OSR_LMT_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
45impl R {
46 #[doc = "Bits 0:2 - NA"]
47 #[inline(always)]
48 pub fn ch1_tt_fc(&self) -> CH1_TT_FC_R {
49 CH1_TT_FC_R::new((self.bits & 7) as u8)
50 }
51 #[doc = "Bit 3 - NA"]
52 #[inline(always)]
53 pub fn ch1_hs_sel_src(&self) -> CH1_HS_SEL_SRC_R {
54 CH1_HS_SEL_SRC_R::new(((self.bits >> 3) & 1) != 0)
55 }
56 #[doc = "Bit 4 - NA"]
57 #[inline(always)]
58 pub fn ch1_hs_sel_dst(&self) -> CH1_HS_SEL_DST_R {
59 CH1_HS_SEL_DST_R::new(((self.bits >> 4) & 1) != 0)
60 }
61 #[doc = "Bit 5 - NA"]
62 #[inline(always)]
63 pub fn ch1_src_hwhs_pol(&self) -> CH1_SRC_HWHS_POL_R {
64 CH1_SRC_HWHS_POL_R::new(((self.bits >> 5) & 1) != 0)
65 }
66 #[doc = "Bit 6 - NA"]
67 #[inline(always)]
68 pub fn ch1_dst_hwhs_pol(&self) -> CH1_DST_HWHS_POL_R {
69 CH1_DST_HWHS_POL_R::new(((self.bits >> 6) & 1) != 0)
70 }
71 #[doc = "Bits 7:8 - NA"]
72 #[inline(always)]
73 pub fn ch1_src_per(&self) -> CH1_SRC_PER_R {
74 CH1_SRC_PER_R::new(((self.bits >> 7) & 3) as u8)
75 }
76 #[doc = "Bits 12:13 - NA"]
77 #[inline(always)]
78 pub fn ch1_dst_per(&self) -> CH1_DST_PER_R {
79 CH1_DST_PER_R::new(((self.bits >> 12) & 3) as u8)
80 }
81 #[doc = "Bits 17:19 - NA"]
82 #[inline(always)]
83 pub fn ch1_ch_prior(&self) -> CH1_CH_PRIOR_R {
84 CH1_CH_PRIOR_R::new(((self.bits >> 17) & 7) as u8)
85 }
86 #[doc = "Bit 20 - NA"]
87 #[inline(always)]
88 pub fn ch1_lock_ch(&self) -> CH1_LOCK_CH_R {
89 CH1_LOCK_CH_R::new(((self.bits >> 20) & 1) != 0)
90 }
91 #[doc = "Bits 21:22 - NA"]
92 #[inline(always)]
93 pub fn ch1_lock_ch_l(&self) -> CH1_LOCK_CH_L_R {
94 CH1_LOCK_CH_L_R::new(((self.bits >> 21) & 3) as u8)
95 }
96 #[doc = "Bits 23:26 - NA"]
97 #[inline(always)]
98 pub fn ch1_src_osr_lmt(&self) -> CH1_SRC_OSR_LMT_R {
99 CH1_SRC_OSR_LMT_R::new(((self.bits >> 23) & 0x0f) as u8)
100 }
101 #[doc = "Bits 27:30 - NA"]
102 #[inline(always)]
103 pub fn ch1_dst_osr_lmt(&self) -> CH1_DST_OSR_LMT_R {
104 CH1_DST_OSR_LMT_R::new(((self.bits >> 27) & 0x0f) as u8)
105 }
106}
107#[cfg(feature = "impl-register-debug")]
108impl core::fmt::Debug for R {
109 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
110 f.debug_struct("CFG1")
111 .field("ch1_tt_fc", &format_args!("{}", self.ch1_tt_fc().bits()))
112 .field(
113 "ch1_hs_sel_src",
114 &format_args!("{}", self.ch1_hs_sel_src().bit()),
115 )
116 .field(
117 "ch1_hs_sel_dst",
118 &format_args!("{}", self.ch1_hs_sel_dst().bit()),
119 )
120 .field(
121 "ch1_src_hwhs_pol",
122 &format_args!("{}", self.ch1_src_hwhs_pol().bit()),
123 )
124 .field(
125 "ch1_dst_hwhs_pol",
126 &format_args!("{}", self.ch1_dst_hwhs_pol().bit()),
127 )
128 .field(
129 "ch1_src_per",
130 &format_args!("{}", self.ch1_src_per().bits()),
131 )
132 .field(
133 "ch1_dst_per",
134 &format_args!("{}", self.ch1_dst_per().bits()),
135 )
136 .field(
137 "ch1_ch_prior",
138 &format_args!("{}", self.ch1_ch_prior().bits()),
139 )
140 .field("ch1_lock_ch", &format_args!("{}", self.ch1_lock_ch().bit()))
141 .field(
142 "ch1_lock_ch_l",
143 &format_args!("{}", self.ch1_lock_ch_l().bits()),
144 )
145 .field(
146 "ch1_src_osr_lmt",
147 &format_args!("{}", self.ch1_src_osr_lmt().bits()),
148 )
149 .field(
150 "ch1_dst_osr_lmt",
151 &format_args!("{}", self.ch1_dst_osr_lmt().bits()),
152 )
153 .finish()
154 }
155}
156#[cfg(feature = "impl-register-debug")]
157impl core::fmt::Debug for crate::generic::Reg<CFG1_SPEC> {
158 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
159 core::fmt::Debug::fmt(&self.read(), f)
160 }
161}
162impl W {
163 #[doc = "Bits 0:2 - NA"]
164 #[inline(always)]
165 #[must_use]
166 pub fn ch1_tt_fc(&mut self) -> CH1_TT_FC_W<CFG1_SPEC> {
167 CH1_TT_FC_W::new(self, 0)
168 }
169 #[doc = "Bit 3 - NA"]
170 #[inline(always)]
171 #[must_use]
172 pub fn ch1_hs_sel_src(&mut self) -> CH1_HS_SEL_SRC_W<CFG1_SPEC> {
173 CH1_HS_SEL_SRC_W::new(self, 3)
174 }
175 #[doc = "Bit 4 - NA"]
176 #[inline(always)]
177 #[must_use]
178 pub fn ch1_hs_sel_dst(&mut self) -> CH1_HS_SEL_DST_W<CFG1_SPEC> {
179 CH1_HS_SEL_DST_W::new(self, 4)
180 }
181 #[doc = "Bits 7:8 - NA"]
182 #[inline(always)]
183 #[must_use]
184 pub fn ch1_src_per(&mut self) -> CH1_SRC_PER_W<CFG1_SPEC> {
185 CH1_SRC_PER_W::new(self, 7)
186 }
187 #[doc = "Bits 12:13 - NA"]
188 #[inline(always)]
189 #[must_use]
190 pub fn ch1_dst_per(&mut self) -> CH1_DST_PER_W<CFG1_SPEC> {
191 CH1_DST_PER_W::new(self, 12)
192 }
193 #[doc = "Bits 17:19 - NA"]
194 #[inline(always)]
195 #[must_use]
196 pub fn ch1_ch_prior(&mut self) -> CH1_CH_PRIOR_W<CFG1_SPEC> {
197 CH1_CH_PRIOR_W::new(self, 17)
198 }
199 #[doc = "Bits 23:26 - NA"]
200 #[inline(always)]
201 #[must_use]
202 pub fn ch1_src_osr_lmt(&mut self) -> CH1_SRC_OSR_LMT_W<CFG1_SPEC> {
203 CH1_SRC_OSR_LMT_W::new(self, 23)
204 }
205 #[doc = "Bits 27:30 - NA"]
206 #[inline(always)]
207 #[must_use]
208 pub fn ch1_dst_osr_lmt(&mut self) -> CH1_DST_OSR_LMT_W<CFG1_SPEC> {
209 CH1_DST_OSR_LMT_W::new(self, 27)
210 }
211}
212#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg1::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg1::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
213pub struct CFG1_SPEC;
214impl crate::RegisterSpec for CFG1_SPEC {
215 type Ux = u32;
216}
217#[doc = "`read()` method returns [`cfg1::R`](R) reader structure"]
218impl crate::Readable for CFG1_SPEC {}
219#[doc = "`write(|w| ..)` method takes [`cfg1::W`](W) writer structure"]
220impl crate::Writable for CFG1_SPEC {
221 type Safety = crate::Unsafe;
222 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
223 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
224}
225#[doc = "`reset()` method sets CFG1 to value 0x0006_001b"]
226impl crate::Resettable for CFG1_SPEC {
227 const RESET_VALUE: u32 = 0x0006_001b;
228}