esp32p4/cache/
l1_dcache_prelock_conf.rs

1#[doc = "Register `L1_DCACHE_PRELOCK_CONF` reader"]
2pub type R = crate::R<L1_DCACHE_PRELOCK_CONF_SPEC>;
3#[doc = "Register `L1_DCACHE_PRELOCK_CONF` writer"]
4pub type W = crate::W<L1_DCACHE_PRELOCK_CONF_SPEC>;
5#[doc = "Field `L1_DCACHE_PRELOCK_SCT0_EN` reader - The bit is used to enable the first section of prelock function on L1-DCache."]
6pub type L1_DCACHE_PRELOCK_SCT0_EN_R = crate::BitReader;
7#[doc = "Field `L1_DCACHE_PRELOCK_SCT0_EN` writer - The bit is used to enable the first section of prelock function on L1-DCache."]
8pub type L1_DCACHE_PRELOCK_SCT0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `L1_DCACHE_PRELOCK_SCT1_EN` reader - The bit is used to enable the second section of prelock function on L1-DCache."]
10pub type L1_DCACHE_PRELOCK_SCT1_EN_R = crate::BitReader;
11#[doc = "Field `L1_DCACHE_PRELOCK_SCT1_EN` writer - The bit is used to enable the second section of prelock function on L1-DCache."]
12pub type L1_DCACHE_PRELOCK_SCT1_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `L1_DCACHE_PRELOCK_RGID` reader - The bit is used to set the gid of l1 dcache prelock."]
14pub type L1_DCACHE_PRELOCK_RGID_R = crate::FieldReader;
15#[doc = "Field `L1_DCACHE_PRELOCK_RGID` writer - The bit is used to set the gid of l1 dcache prelock."]
16pub type L1_DCACHE_PRELOCK_RGID_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
17impl R {
18    #[doc = "Bit 0 - The bit is used to enable the first section of prelock function on L1-DCache."]
19    #[inline(always)]
20    pub fn l1_dcache_prelock_sct0_en(&self) -> L1_DCACHE_PRELOCK_SCT0_EN_R {
21        L1_DCACHE_PRELOCK_SCT0_EN_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - The bit is used to enable the second section of prelock function on L1-DCache."]
24    #[inline(always)]
25    pub fn l1_dcache_prelock_sct1_en(&self) -> L1_DCACHE_PRELOCK_SCT1_EN_R {
26        L1_DCACHE_PRELOCK_SCT1_EN_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bits 2:5 - The bit is used to set the gid of l1 dcache prelock."]
29    #[inline(always)]
30    pub fn l1_dcache_prelock_rgid(&self) -> L1_DCACHE_PRELOCK_RGID_R {
31        L1_DCACHE_PRELOCK_RGID_R::new(((self.bits >> 2) & 0x0f) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("L1_DCACHE_PRELOCK_CONF")
38            .field(
39                "l1_dcache_prelock_sct0_en",
40                &format_args!("{}", self.l1_dcache_prelock_sct0_en().bit()),
41            )
42            .field(
43                "l1_dcache_prelock_sct1_en",
44                &format_args!("{}", self.l1_dcache_prelock_sct1_en().bit()),
45            )
46            .field(
47                "l1_dcache_prelock_rgid",
48                &format_args!("{}", self.l1_dcache_prelock_rgid().bits()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<L1_DCACHE_PRELOCK_CONF_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bit 0 - The bit is used to enable the first section of prelock function on L1-DCache."]
61    #[inline(always)]
62    #[must_use]
63    pub fn l1_dcache_prelock_sct0_en(
64        &mut self,
65    ) -> L1_DCACHE_PRELOCK_SCT0_EN_W<L1_DCACHE_PRELOCK_CONF_SPEC> {
66        L1_DCACHE_PRELOCK_SCT0_EN_W::new(self, 0)
67    }
68    #[doc = "Bit 1 - The bit is used to enable the second section of prelock function on L1-DCache."]
69    #[inline(always)]
70    #[must_use]
71    pub fn l1_dcache_prelock_sct1_en(
72        &mut self,
73    ) -> L1_DCACHE_PRELOCK_SCT1_EN_W<L1_DCACHE_PRELOCK_CONF_SPEC> {
74        L1_DCACHE_PRELOCK_SCT1_EN_W::new(self, 1)
75    }
76    #[doc = "Bits 2:5 - The bit is used to set the gid of l1 dcache prelock."]
77    #[inline(always)]
78    #[must_use]
79    pub fn l1_dcache_prelock_rgid(
80        &mut self,
81    ) -> L1_DCACHE_PRELOCK_RGID_W<L1_DCACHE_PRELOCK_CONF_SPEC> {
82        L1_DCACHE_PRELOCK_RGID_W::new(self, 2)
83    }
84}
85#[doc = "L1 data Cache prelock configure register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l1_dcache_prelock_conf::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`l1_dcache_prelock_conf::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
86pub struct L1_DCACHE_PRELOCK_CONF_SPEC;
87impl crate::RegisterSpec for L1_DCACHE_PRELOCK_CONF_SPEC {
88    type Ux = u32;
89}
90#[doc = "`read()` method returns [`l1_dcache_prelock_conf::R`](R) reader structure"]
91impl crate::Readable for L1_DCACHE_PRELOCK_CONF_SPEC {}
92#[doc = "`write(|w| ..)` method takes [`l1_dcache_prelock_conf::W`](W) writer structure"]
93impl crate::Writable for L1_DCACHE_PRELOCK_CONF_SPEC {
94    type Safety = crate::Unsafe;
95    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
96    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
97}
98#[doc = "`reset()` method sets L1_DCACHE_PRELOCK_CONF to value 0"]
99impl crate::Resettable for L1_DCACHE_PRELOCK_CONF_SPEC {
100    const RESET_VALUE: u32 = 0;
101}
esp32p4/cache/l1_dcache_prelock_conf.rs

esp32p4/cache/
l1_dcache_prelock_conf.rs
