esp32p4/assist_debug/
core_1_sp_pc.rs

1#[doc = "Register `CORE_1_SP_PC` reader"]
2pub type R = crate::R<CORE_1_SP_PC_SPEC>;
3#[doc = "Field `CORE_1_SP_PC` reader - This regsiter stores the PC when trigger stack monitor."]
4pub type CORE_1_SP_PC_R = crate::FieldReader<u32>;
5impl R {
6    #[doc = "Bits 0:31 - This regsiter stores the PC when trigger stack monitor."]
7    #[inline(always)]
8    pub fn core_1_sp_pc(&self) -> CORE_1_SP_PC_R {
9        CORE_1_SP_PC_R::new(self.bits)
10    }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15        f.debug_struct("CORE_1_SP_PC")
16            .field(
17                "core_1_sp_pc",
18                &format_args!("{}", self.core_1_sp_pc().bits()),
19            )
20            .finish()
21    }
22}
23#[cfg(feature = "impl-register-debug")]
24impl core::fmt::Debug for crate::generic::Reg<CORE_1_SP_PC_SPEC> {
25    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
26        core::fmt::Debug::fmt(&self.read(), f)
27    }
28}
29#[doc = "stack monitor pc status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`core_1_sp_pc::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct CORE_1_SP_PC_SPEC;
31impl crate::RegisterSpec for CORE_1_SP_PC_SPEC {
32    type Ux = u32;
33}
34#[doc = "`read()` method returns [`core_1_sp_pc::R`](R) reader structure"]
35impl crate::Readable for CORE_1_SP_PC_SPEC {}
36#[doc = "`reset()` method sets CORE_1_SP_PC to value 0"]
37impl crate::Resettable for CORE_1_SP_PC_SPEC {
38    const RESET_VALUE: u32 = 0;
39}