esp32p4/ahb_dma/in_crc_ch/
rx_crc_width.rs

1#[doc = "Register `RX_CRC_WIDTH` reader"]
2pub type R = crate::R<RX_CRC_WIDTH_SPEC>;
3#[doc = "Register `RX_CRC_WIDTH` writer"]
4pub type W = crate::W<RX_CRC_WIDTH_SPEC>;
5#[doc = "Field `RX_CRC_WIDTH` reader - reserved"]
6pub type RX_CRC_WIDTH_R = crate::FieldReader;
7#[doc = "Field `RX_CRC_WIDTH` writer - reserved"]
8pub type RX_CRC_WIDTH_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `RX_CRC_LAUTCH_FLGA` reader - reserved"]
10pub type RX_CRC_LAUTCH_FLGA_R = crate::BitReader;
11#[doc = "Field `RX_CRC_LAUTCH_FLGA` writer - reserved"]
12pub type RX_CRC_LAUTCH_FLGA_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 0:1 - reserved"]
15    #[inline(always)]
16    pub fn rx_crc_width(&self) -> RX_CRC_WIDTH_R {
17        RX_CRC_WIDTH_R::new((self.bits & 3) as u8)
18    }
19    #[doc = "Bit 2 - reserved"]
20    #[inline(always)]
21    pub fn rx_crc_lautch_flga(&self) -> RX_CRC_LAUTCH_FLGA_R {
22        RX_CRC_LAUTCH_FLGA_R::new(((self.bits >> 2) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("RX_CRC_WIDTH")
29            .field(
30                "rx_crc_width",
31                &format_args!("{}", self.rx_crc_width().bits()),
32            )
33            .field(
34                "rx_crc_lautch_flga",
35                &format_args!("{}", self.rx_crc_lautch_flga().bit()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<RX_CRC_WIDTH_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:1 - reserved"]
48    #[inline(always)]
49    #[must_use]
50    pub fn rx_crc_width(&mut self) -> RX_CRC_WIDTH_W<RX_CRC_WIDTH_SPEC> {
51        RX_CRC_WIDTH_W::new(self, 0)
52    }
53    #[doc = "Bit 2 - reserved"]
54    #[inline(always)]
55    #[must_use]
56    pub fn rx_crc_lautch_flga(&mut self) -> RX_CRC_LAUTCH_FLGA_W<RX_CRC_WIDTH_SPEC> {
57        RX_CRC_LAUTCH_FLGA_W::new(self, 2)
58    }
59}
60#[doc = "This register is used to confiig rx ch0 crc result width,2'b00 mean crc_width &lt;=8bit,2'b01 8&lt;crc_width&lt;=16 ,2'b10 mean 16&lt;crc_width &lt;=24,2'b11 mean 24&lt;crc_width&lt;=32\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rx_crc_width::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rx_crc_width::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct RX_CRC_WIDTH_SPEC;
62impl crate::RegisterSpec for RX_CRC_WIDTH_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`rx_crc_width::R`](R) reader structure"]
66impl crate::Readable for RX_CRC_WIDTH_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`rx_crc_width::W`](W) writer structure"]
68impl crate::Writable for RX_CRC_WIDTH_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets RX_CRC_WIDTH to value 0"]
74impl crate::Resettable for RX_CRC_WIDTH_SPEC {
75    const RESET_VALUE: u32 = 0;
76}
esp32p4/ahb_dma/in_crc_ch/rx_crc_width.rs

esp32p4/ahb_dma/in_crc_ch/
rx_crc_width.rs
