esp32p4/adc/
thres1_ctrl.rs

1#[doc = "Register `THRES1_CTRL` reader"]
2pub type R = crate::R<THRES1_CTRL_SPEC>;
3#[doc = "Register `THRES1_CTRL` writer"]
4pub type W = crate::W<THRES1_CTRL_SPEC>;
5#[doc = "Field `THRES1_CHANNEL` reader - need_des"]
6pub type THRES1_CHANNEL_R = crate::FieldReader;
7#[doc = "Field `THRES1_CHANNEL` writer - need_des"]
8pub type THRES1_CHANNEL_W<'a, REG> = crate::FieldWriter<'a, REG, 5>;
9#[doc = "Field `THRES1_HIGH` reader - saradc1's thres0 monitor thres"]
10pub type THRES1_HIGH_R = crate::FieldReader<u16>;
11#[doc = "Field `THRES1_HIGH` writer - saradc1's thres0 monitor thres"]
12pub type THRES1_HIGH_W<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>;
13#[doc = "Field `THRES1_LOW` reader - saradc1's thres0 monitor thres"]
14pub type THRES1_LOW_R = crate::FieldReader<u16>;
15#[doc = "Field `THRES1_LOW` writer - saradc1's thres0 monitor thres"]
16pub type THRES1_LOW_W<'a, REG> = crate::FieldWriter<'a, REG, 13, u16>;
17impl R {
18    #[doc = "Bits 0:4 - need_des"]
19    #[inline(always)]
20    pub fn thres1_channel(&self) -> THRES1_CHANNEL_R {
21        THRES1_CHANNEL_R::new((self.bits & 0x1f) as u8)
22    }
23    #[doc = "Bits 5:17 - saradc1's thres0 monitor thres"]
24    #[inline(always)]
25    pub fn thres1_high(&self) -> THRES1_HIGH_R {
26        THRES1_HIGH_R::new(((self.bits >> 5) & 0x1fff) as u16)
27    }
28    #[doc = "Bits 18:30 - saradc1's thres0 monitor thres"]
29    #[inline(always)]
30    pub fn thres1_low(&self) -> THRES1_LOW_R {
31        THRES1_LOW_R::new(((self.bits >> 18) & 0x1fff) as u16)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("THRES1_CTRL")
38            .field(
39                "thres1_channel",
40                &format_args!("{}", self.thres1_channel().bits()),
41            )
42            .field(
43                "thres1_high",
44                &format_args!("{}", self.thres1_high().bits()),
45            )
46            .field("thres1_low", &format_args!("{}", self.thres1_low().bits()))
47            .finish()
48    }
49}
50#[cfg(feature = "impl-register-debug")]
51impl core::fmt::Debug for crate::generic::Reg<THRES1_CTRL_SPEC> {
52    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
53        core::fmt::Debug::fmt(&self.read(), f)
54    }
55}
56impl W {
57    #[doc = "Bits 0:4 - need_des"]
58    #[inline(always)]
59    #[must_use]
60    pub fn thres1_channel(&mut self) -> THRES1_CHANNEL_W<THRES1_CTRL_SPEC> {
61        THRES1_CHANNEL_W::new(self, 0)
62    }
63    #[doc = "Bits 5:17 - saradc1's thres0 monitor thres"]
64    #[inline(always)]
65    #[must_use]
66    pub fn thres1_high(&mut self) -> THRES1_HIGH_W<THRES1_CTRL_SPEC> {
67        THRES1_HIGH_W::new(self, 5)
68    }
69    #[doc = "Bits 18:30 - saradc1's thres0 monitor thres"]
70    #[inline(always)]
71    #[must_use]
72    pub fn thres1_low(&mut self) -> THRES1_LOW_W<THRES1_CTRL_SPEC> {
73        THRES1_LOW_W::new(self, 18)
74    }
75}
76#[doc = "Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`thres1_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`thres1_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct THRES1_CTRL_SPEC;
78impl crate::RegisterSpec for THRES1_CTRL_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`thres1_ctrl::R`](R) reader structure"]
82impl crate::Readable for THRES1_CTRL_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`thres1_ctrl::W`](W) writer structure"]
84impl crate::Writable for THRES1_CTRL_SPEC {
85    type Safety = crate::Unsafe;
86    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
87    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
88}
89#[doc = "`reset()` method sets THRES1_CTRL to value 0x0003_ffed"]
90impl crate::Resettable for THRES1_CTRL_SPEC {
91    const RESET_VALUE: u32 = 0x0003_ffed;
92}
esp32p4/adc/thres1_ctrl.rs

esp32p4/adc/
thres1_ctrl.rs
