1#[doc = "Register `STATUS` reader"]
2pub type R = crate::R<STATUS_SPEC>;
3#[doc = "Field `RECEIVE_BUFFER` reader - 1: full, one or more complete messages are available in the RXFIFO. 0: empty, no message is available"]
4pub type RECEIVE_BUFFER_R = crate::BitReader;
5#[doc = "Field `OVERRUN` reader - 1: overrun, a message was lost because there was not enough space for that message in the RXFIFO. 0: absent, no data overrun has occurred since the last clear data overrun command was given"]
6pub type OVERRUN_R = crate::BitReader;
7#[doc = "Field `TRANSMIT_BUFFER` reader - 1: released, the CPU may write a message into the transmit buffer. 0: locked, the CPU cannot access the transmit buffer, a message is either waiting for transmission or is in the process of being transmitted"]
8pub type TRANSMIT_BUFFER_R = crate::BitReader;
9#[doc = "Field `TRANSMISSION_COMPLETE` reader - 1: complete, last requested transmission has been successfully completed. 0: incomplete, previously requested transmission is not yet completed"]
10pub type TRANSMISSION_COMPLETE_R = crate::BitReader;
11#[doc = "Field `RECEIVE` reader - 1: receive, the TWAI controller is receiving a message. 0: idle"]
12pub type RECEIVE_R = crate::BitReader;
13#[doc = "Field `TRANSMIT` reader - 1: transmit, the TWAI controller is transmitting a message. 0: idle"]
14pub type TRANSMIT_R = crate::BitReader;
15#[doc = "Field `ERR` reader - 1: error, at least one of the error counters has reached or exceeded the CPU warning limit defined by the Error Warning Limit Register (EWLR). 0: ok, both error counters are below the warning limit"]
16pub type ERR_R = crate::BitReader;
17#[doc = "Field `NODE_BUS_OFF` reader - 1: bus-off, the TWAI controller is not involved in bus activities. 0: bus-on, the TWAI controller is involved in bus activities"]
18pub type NODE_BUS_OFF_R = crate::BitReader;
19#[doc = "Field `MISS` reader - 1: current message is destroyed because of FIFO overflow."]
20pub type MISS_R = crate::BitReader;
21impl R {
22 #[doc = "Bit 0 - 1: full, one or more complete messages are available in the RXFIFO. 0: empty, no message is available"]
23 #[inline(always)]
24 pub fn receive_buffer(&self) -> RECEIVE_BUFFER_R {
25 RECEIVE_BUFFER_R::new((self.bits & 1) != 0)
26 }
27 #[doc = "Bit 1 - 1: overrun, a message was lost because there was not enough space for that message in the RXFIFO. 0: absent, no data overrun has occurred since the last clear data overrun command was given"]
28 #[inline(always)]
29 pub fn overrun(&self) -> OVERRUN_R {
30 OVERRUN_R::new(((self.bits >> 1) & 1) != 0)
31 }
32 #[doc = "Bit 2 - 1: released, the CPU may write a message into the transmit buffer. 0: locked, the CPU cannot access the transmit buffer, a message is either waiting for transmission or is in the process of being transmitted"]
33 #[inline(always)]
34 pub fn transmit_buffer(&self) -> TRANSMIT_BUFFER_R {
35 TRANSMIT_BUFFER_R::new(((self.bits >> 2) & 1) != 0)
36 }
37 #[doc = "Bit 3 - 1: complete, last requested transmission has been successfully completed. 0: incomplete, previously requested transmission is not yet completed"]
38 #[inline(always)]
39 pub fn transmission_complete(&self) -> TRANSMISSION_COMPLETE_R {
40 TRANSMISSION_COMPLETE_R::new(((self.bits >> 3) & 1) != 0)
41 }
42 #[doc = "Bit 4 - 1: receive, the TWAI controller is receiving a message. 0: idle"]
43 #[inline(always)]
44 pub fn receive(&self) -> RECEIVE_R {
45 RECEIVE_R::new(((self.bits >> 4) & 1) != 0)
46 }
47 #[doc = "Bit 5 - 1: transmit, the TWAI controller is transmitting a message. 0: idle"]
48 #[inline(always)]
49 pub fn transmit(&self) -> TRANSMIT_R {
50 TRANSMIT_R::new(((self.bits >> 5) & 1) != 0)
51 }
52 #[doc = "Bit 6 - 1: error, at least one of the error counters has reached or exceeded the CPU warning limit defined by the Error Warning Limit Register (EWLR). 0: ok, both error counters are below the warning limit"]
53 #[inline(always)]
54 pub fn err(&self) -> ERR_R {
55 ERR_R::new(((self.bits >> 6) & 1) != 0)
56 }
57 #[doc = "Bit 7 - 1: bus-off, the TWAI controller is not involved in bus activities. 0: bus-on, the TWAI controller is involved in bus activities"]
58 #[inline(always)]
59 pub fn node_bus_off(&self) -> NODE_BUS_OFF_R {
60 NODE_BUS_OFF_R::new(((self.bits >> 7) & 1) != 0)
61 }
62 #[doc = "Bit 8 - 1: current message is destroyed because of FIFO overflow."]
63 #[inline(always)]
64 pub fn miss(&self) -> MISS_R {
65 MISS_R::new(((self.bits >> 8) & 1) != 0)
66 }
67}
68#[cfg(feature = "impl-register-debug")]
69impl core::fmt::Debug for R {
70 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
71 f.debug_struct("STATUS")
72 .field(
73 "receive_buffer",
74 &format_args!("{}", self.receive_buffer().bit()),
75 )
76 .field("overrun", &format_args!("{}", self.overrun().bit()))
77 .field(
78 "transmit_buffer",
79 &format_args!("{}", self.transmit_buffer().bit()),
80 )
81 .field(
82 "transmission_complete",
83 &format_args!("{}", self.transmission_complete().bit()),
84 )
85 .field("receive", &format_args!("{}", self.receive().bit()))
86 .field("transmit", &format_args!("{}", self.transmit().bit()))
87 .field("err", &format_args!("{}", self.err().bit()))
88 .field(
89 "node_bus_off",
90 &format_args!("{}", self.node_bus_off().bit()),
91 )
92 .field("miss", &format_args!("{}", self.miss().bit()))
93 .finish()
94 }
95}
96#[cfg(feature = "impl-register-debug")]
97impl core::fmt::Debug for crate::generic::Reg<STATUS_SPEC> {
98 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
99 core::fmt::Debug::fmt(&self.read(), f)
100 }
101}
102#[doc = "TWAI status register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
103pub struct STATUS_SPEC;
104impl crate::RegisterSpec for STATUS_SPEC {
105 type Ux = u32;
106}
107#[doc = "`read()` method returns [`status::R`](R) reader structure"]
108impl crate::Readable for STATUS_SPEC {}
109#[doc = "`reset()` method sets STATUS to value 0"]
110impl crate::Resettable for STATUS_SPEC {
111 const RESET_VALUE: u32 = 0;
112}