esp32p4/systimer/
int_ena.rs

1#[doc = "Register `INT_ENA` reader"]
2pub type R = crate::R<INT_ENA_SPEC>;
3#[doc = "Register `INT_ENA` writer"]
4pub type W = crate::W<INT_ENA_SPEC>;
5#[doc = "Field `TARGET0` reader - interupt0 enable"]
6pub type TARGET0_R = crate::BitReader;
7#[doc = "Field `TARGET0` writer - interupt0 enable"]
8pub type TARGET0_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `TARGET1` reader - interupt1 enable"]
10pub type TARGET1_R = crate::BitReader;
11#[doc = "Field `TARGET1` writer - interupt1 enable"]
12pub type TARGET1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `TARGET2` reader - interupt2 enable"]
14pub type TARGET2_R = crate::BitReader;
15#[doc = "Field `TARGET2` writer - interupt2 enable"]
16pub type TARGET2_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - interupt0 enable"]
19    #[inline(always)]
20    pub fn target0(&self) -> TARGET0_R {
21        TARGET0_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - interupt1 enable"]
24    #[inline(always)]
25    pub fn target1(&self) -> TARGET1_R {
26        TARGET1_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - interupt2 enable"]
29    #[inline(always)]
30    pub fn target2(&self) -> TARGET2_R {
31        TARGET2_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("INT_ENA")
38            .field("target0", &format_args!("{}", self.target0().bit()))
39            .field("target1", &format_args!("{}", self.target1().bit()))
40            .field("target2", &format_args!("{}", self.target2().bit()))
41            .finish()
42    }
43}
44#[cfg(feature = "impl-register-debug")]
45impl core::fmt::Debug for crate::generic::Reg<INT_ENA_SPEC> {
46    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
47        core::fmt::Debug::fmt(&self.read(), f)
48    }
49}
50impl W {
51    #[doc = "Bit 0 - interupt0 enable"]
52    #[inline(always)]
53    #[must_use]
54    pub fn target0(&mut self) -> TARGET0_W<INT_ENA_SPEC> {
55        TARGET0_W::new(self, 0)
56    }
57    #[doc = "Bit 1 - interupt1 enable"]
58    #[inline(always)]
59    #[must_use]
60    pub fn target1(&mut self) -> TARGET1_W<INT_ENA_SPEC> {
61        TARGET1_W::new(self, 1)
62    }
63    #[doc = "Bit 2 - interupt2 enable"]
64    #[inline(always)]
65    #[must_use]
66    pub fn target2(&mut self) -> TARGET2_W<INT_ENA_SPEC> {
67        TARGET2_W::new(self, 2)
68    }
69}
70#[doc = "systimer interrupt enable register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_ena::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_ena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
71pub struct INT_ENA_SPEC;
72impl crate::RegisterSpec for INT_ENA_SPEC {
73    type Ux = u32;
74}
75#[doc = "`read()` method returns [`int_ena::R`](R) reader structure"]
76impl crate::Readable for INT_ENA_SPEC {}
77#[doc = "`write(|w| ..)` method takes [`int_ena::W`](W) writer structure"]
78impl crate::Writable for INT_ENA_SPEC {
79    type Safety = crate::Unsafe;
80    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
81    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
82}
83#[doc = "`reset()` method sets INT_ENA to value 0"]
84impl crate::Resettable for INT_ENA_SPEC {
85    const RESET_VALUE: u32 = 0;
86}
esp32p4/systimer/int_ena.rs

esp32p4/systimer/
int_ena.rs
