esp32p4/ppa/
sr_mem_pd.rs

1#[doc = "Register `SR_MEM_PD` reader"]
2pub type R = crate::R<SR_MEM_PD_SPEC>;
3#[doc = "Register `SR_MEM_PD` writer"]
4pub type W = crate::W<SR_MEM_PD_SPEC>;
5#[doc = "Field `SR_MEM_CLK_ENA` reader - Set this bit to force clock enable of scaling and rotating engine's data memory."]
6pub type SR_MEM_CLK_ENA_R = crate::BitReader;
7#[doc = "Field `SR_MEM_CLK_ENA` writer - Set this bit to force clock enable of scaling and rotating engine's data memory."]
8pub type SR_MEM_CLK_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SR_MEM_FORCE_PD` reader - Set this bit to force power down scaling and rotating engine's data memory."]
10pub type SR_MEM_FORCE_PD_R = crate::BitReader;
11#[doc = "Field `SR_MEM_FORCE_PD` writer - Set this bit to force power down scaling and rotating engine's data memory."]
12pub type SR_MEM_FORCE_PD_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `SR_MEM_FORCE_PU` reader - Set this bit to force power up scaling and rotating engine's data memory."]
14pub type SR_MEM_FORCE_PU_R = crate::BitReader;
15#[doc = "Field `SR_MEM_FORCE_PU` writer - Set this bit to force power up scaling and rotating engine's data memory."]
16pub type SR_MEM_FORCE_PU_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 0 - Set this bit to force clock enable of scaling and rotating engine's data memory."]
19    #[inline(always)]
20    pub fn sr_mem_clk_ena(&self) -> SR_MEM_CLK_ENA_R {
21        SR_MEM_CLK_ENA_R::new((self.bits & 1) != 0)
22    }
23    #[doc = "Bit 1 - Set this bit to force power down scaling and rotating engine's data memory."]
24    #[inline(always)]
25    pub fn sr_mem_force_pd(&self) -> SR_MEM_FORCE_PD_R {
26        SR_MEM_FORCE_PD_R::new(((self.bits >> 1) & 1) != 0)
27    }
28    #[doc = "Bit 2 - Set this bit to force power up scaling and rotating engine's data memory."]
29    #[inline(always)]
30    pub fn sr_mem_force_pu(&self) -> SR_MEM_FORCE_PU_R {
31        SR_MEM_FORCE_PU_R::new(((self.bits >> 2) & 1) != 0)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("SR_MEM_PD")
38            .field(
39                "sr_mem_clk_ena",
40                &format_args!("{}", self.sr_mem_clk_ena().bit()),
41            )
42            .field(
43                "sr_mem_force_pd",
44                &format_args!("{}", self.sr_mem_force_pd().bit()),
45            )
46            .field(
47                "sr_mem_force_pu",
48                &format_args!("{}", self.sr_mem_force_pu().bit()),
49            )
50            .finish()
51    }
52}
53#[cfg(feature = "impl-register-debug")]
54impl core::fmt::Debug for crate::generic::Reg<SR_MEM_PD_SPEC> {
55    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
56        core::fmt::Debug::fmt(&self.read(), f)
57    }
58}
59impl W {
60    #[doc = "Bit 0 - Set this bit to force clock enable of scaling and rotating engine's data memory."]
61    #[inline(always)]
62    #[must_use]
63    pub fn sr_mem_clk_ena(&mut self) -> SR_MEM_CLK_ENA_W<SR_MEM_PD_SPEC> {
64        SR_MEM_CLK_ENA_W::new(self, 0)
65    }
66    #[doc = "Bit 1 - Set this bit to force power down scaling and rotating engine's data memory."]
67    #[inline(always)]
68    #[must_use]
69    pub fn sr_mem_force_pd(&mut self) -> SR_MEM_FORCE_PD_W<SR_MEM_PD_SPEC> {
70        SR_MEM_FORCE_PD_W::new(self, 1)
71    }
72    #[doc = "Bit 2 - Set this bit to force power up scaling and rotating engine's data memory."]
73    #[inline(always)]
74    #[must_use]
75    pub fn sr_mem_force_pu(&mut self) -> SR_MEM_FORCE_PU_W<SR_MEM_PD_SPEC> {
76        SR_MEM_FORCE_PU_W::new(self, 2)
77    }
78}
79#[doc = "SR memory power done register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`sr_mem_pd::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`sr_mem_pd::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
80pub struct SR_MEM_PD_SPEC;
81impl crate::RegisterSpec for SR_MEM_PD_SPEC {
82    type Ux = u32;
83}
84#[doc = "`read()` method returns [`sr_mem_pd::R`](R) reader structure"]
85impl crate::Readable for SR_MEM_PD_SPEC {}
86#[doc = "`write(|w| ..)` method takes [`sr_mem_pd::W`](W) writer structure"]
87impl crate::Writable for SR_MEM_PD_SPEC {
88    type Safety = crate::Unsafe;
89    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
90    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
91}
92#[doc = "`reset()` method sets SR_MEM_PD to value 0"]
93impl crate::Resettable for SR_MEM_PD_SPEC {
94    const RESET_VALUE: u32 = 0;
95}
esp32p4/ppa/sr_mem_pd.rs

esp32p4/ppa/
sr_mem_pd.rs
