1#[doc = "Register `LP_INT_ENA` reader"]
2pub type R = crate::R<LP_INT_ENA_SPEC>;
3#[doc = "Register `LP_INT_ENA` writer"]
4pub type W = crate::W<LP_INT_ENA_SPEC>;
5#[doc = "Field `LP_CPU_SLEEP_REJECT` reader - need_des"]
6pub type LP_CPU_SLEEP_REJECT_R = crate::BitReader;
7#[doc = "Field `LP_CPU_SLEEP_REJECT` writer - need_des"]
8pub type LP_CPU_SLEEP_REJECT_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `_0P1A_CNT_TARGET0_REACH_0_LP` reader - reg_0p1a_0_counter after xpd reach target0"]
10pub type _0P1A_CNT_TARGET0_REACH_0_LP_R = crate::BitReader;
11#[doc = "Field `_0P1A_CNT_TARGET0_REACH_0_LP` writer - reg_0p1a_0_counter after xpd reach target0"]
12pub type _0P1A_CNT_TARGET0_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `_0P1A_CNT_TARGET1_REACH_0_LP` reader - reg_0p1a_1_counter after xpd reach target1"]
14pub type _0P1A_CNT_TARGET1_REACH_0_LP_R = crate::BitReader;
15#[doc = "Field `_0P1A_CNT_TARGET1_REACH_0_LP` writer - reg_0p1a_1_counter after xpd reach target1"]
16pub type _0P1A_CNT_TARGET1_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `_0P1A_CNT_TARGET0_REACH_1_LP` reader - reg_0p1a_0 counter after xpd reach target0"]
18pub type _0P1A_CNT_TARGET0_REACH_1_LP_R = crate::BitReader;
19#[doc = "Field `_0P1A_CNT_TARGET0_REACH_1_LP` writer - reg_0p1a_0 counter after xpd reach target0"]
20pub type _0P1A_CNT_TARGET0_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `_0P1A_CNT_TARGET1_REACH_1_LP` reader - reg_0p1a_1_counter after xpd reach target1"]
22pub type _0P1A_CNT_TARGET1_REACH_1_LP_R = crate::BitReader;
23#[doc = "Field `_0P1A_CNT_TARGET1_REACH_1_LP` writer - reg_0p1a_1_counter after xpd reach target1"]
24pub type _0P1A_CNT_TARGET1_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `_0P2A_CNT_TARGET0_REACH_0_LP` reader - reg_0p2a_0 counter after xpd reach target0"]
26pub type _0P2A_CNT_TARGET0_REACH_0_LP_R = crate::BitReader;
27#[doc = "Field `_0P2A_CNT_TARGET0_REACH_0_LP` writer - reg_0p2a_0 counter after xpd reach target0"]
28pub type _0P2A_CNT_TARGET0_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `_0P2A_CNT_TARGET1_REACH_0_LP` reader - reg_0p2a_1_counter after xpd reach target1"]
30pub type _0P2A_CNT_TARGET1_REACH_0_LP_R = crate::BitReader;
31#[doc = "Field `_0P2A_CNT_TARGET1_REACH_0_LP` writer - reg_0p2a_1_counter after xpd reach target1"]
32pub type _0P2A_CNT_TARGET1_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `_0P2A_CNT_TARGET0_REACH_1_LP` reader - reg_0p2a_0 counter after xpd reach target0"]
34pub type _0P2A_CNT_TARGET0_REACH_1_LP_R = crate::BitReader;
35#[doc = "Field `_0P2A_CNT_TARGET0_REACH_1_LP` writer - reg_0p2a_0 counter after xpd reach target0"]
36pub type _0P2A_CNT_TARGET0_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `_0P2A_CNT_TARGET1_REACH_1_LP` reader - reg_0p2a_1_counter after xpd reach target1"]
38pub type _0P2A_CNT_TARGET1_REACH_1_LP_R = crate::BitReader;
39#[doc = "Field `_0P2A_CNT_TARGET1_REACH_1_LP` writer - reg_0p2a_1_counter after xpd reach target1"]
40pub type _0P2A_CNT_TARGET1_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `_0P3A_CNT_TARGET0_REACH_0_LP` reader - reg_0p3a_0 counter after xpd reach target0"]
42pub type _0P3A_CNT_TARGET0_REACH_0_LP_R = crate::BitReader;
43#[doc = "Field `_0P3A_CNT_TARGET0_REACH_0_LP` writer - reg_0p3a_0 counter after xpd reach target0"]
44pub type _0P3A_CNT_TARGET0_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
45#[doc = "Field `_0P3A_CNT_TARGET1_REACH_0_LP` reader - reg_0p3a_1_counter after xpd reach target1"]
46pub type _0P3A_CNT_TARGET1_REACH_0_LP_R = crate::BitReader;
47#[doc = "Field `_0P3A_CNT_TARGET1_REACH_0_LP` writer - reg_0p3a_1_counter after xpd reach target1"]
48pub type _0P3A_CNT_TARGET1_REACH_0_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
49#[doc = "Field `_0P3A_CNT_TARGET0_REACH_1_LP` reader - reg_0p3a_0_counter after xpd reach target0"]
50pub type _0P3A_CNT_TARGET0_REACH_1_LP_R = crate::BitReader;
51#[doc = "Field `_0P3A_CNT_TARGET0_REACH_1_LP` writer - reg_0p3a_0_counter after xpd reach target0"]
52pub type _0P3A_CNT_TARGET0_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
53#[doc = "Field `_0P3A_CNT_TARGET1_REACH_1_LP` reader - reg_0p3a_1_counter after xpd reach target1"]
54pub type _0P3A_CNT_TARGET1_REACH_1_LP_R = crate::BitReader;
55#[doc = "Field `_0P3A_CNT_TARGET1_REACH_1_LP` writer - reg_0p3a_1_counter after xpd reach target1"]
56pub type _0P3A_CNT_TARGET1_REACH_1_LP_W<'a, REG> = crate::BitWriter<'a, REG>;
57#[doc = "Field `LP_CPU_WAKEUP` reader - need_des"]
58pub type LP_CPU_WAKEUP_R = crate::BitReader;
59#[doc = "Field `LP_CPU_WAKEUP` writer - need_des"]
60pub type LP_CPU_WAKEUP_W<'a, REG> = crate::BitWriter<'a, REG>;
61#[doc = "Field `SLEEP_SWITCH_ACTIVE_END` reader - need_des"]
62pub type SLEEP_SWITCH_ACTIVE_END_R = crate::BitReader;
63#[doc = "Field `SLEEP_SWITCH_ACTIVE_END` writer - need_des"]
64pub type SLEEP_SWITCH_ACTIVE_END_W<'a, REG> = crate::BitWriter<'a, REG>;
65#[doc = "Field `ACTIVE_SWITCH_SLEEP_END` reader - need_des"]
66pub type ACTIVE_SWITCH_SLEEP_END_R = crate::BitReader;
67#[doc = "Field `ACTIVE_SWITCH_SLEEP_END` writer - need_des"]
68pub type ACTIVE_SWITCH_SLEEP_END_W<'a, REG> = crate::BitWriter<'a, REG>;
69#[doc = "Field `SLEEP_SWITCH_ACTIVE_START` reader - need_des"]
70pub type SLEEP_SWITCH_ACTIVE_START_R = crate::BitReader;
71#[doc = "Field `SLEEP_SWITCH_ACTIVE_START` writer - need_des"]
72pub type SLEEP_SWITCH_ACTIVE_START_W<'a, REG> = crate::BitWriter<'a, REG>;
73#[doc = "Field `ACTIVE_SWITCH_SLEEP_START` reader - need_des"]
74pub type ACTIVE_SWITCH_SLEEP_START_R = crate::BitReader;
75#[doc = "Field `ACTIVE_SWITCH_SLEEP_START` writer - need_des"]
76pub type ACTIVE_SWITCH_SLEEP_START_W<'a, REG> = crate::BitWriter<'a, REG>;
77#[doc = "Field `HP_SW_TRIGGER` reader - need_des"]
78pub type HP_SW_TRIGGER_R = crate::BitReader;
79#[doc = "Field `HP_SW_TRIGGER` writer - need_des"]
80pub type HP_SW_TRIGGER_W<'a, REG> = crate::BitWriter<'a, REG>;
81impl R {
82 #[doc = "Bit 13 - need_des"]
83 #[inline(always)]
84 pub fn lp_cpu_sleep_reject(&self) -> LP_CPU_SLEEP_REJECT_R {
85 LP_CPU_SLEEP_REJECT_R::new(((self.bits >> 13) & 1) != 0)
86 }
87 #[doc = "Bit 14 - reg_0p1a_0_counter after xpd reach target0"]
88 #[inline(always)]
89 pub fn _0p1a_cnt_target0_reach_0_lp(&self) -> _0P1A_CNT_TARGET0_REACH_0_LP_R {
90 _0P1A_CNT_TARGET0_REACH_0_LP_R::new(((self.bits >> 14) & 1) != 0)
91 }
92 #[doc = "Bit 15 - reg_0p1a_1_counter after xpd reach target1"]
93 #[inline(always)]
94 pub fn _0p1a_cnt_target1_reach_0_lp(&self) -> _0P1A_CNT_TARGET1_REACH_0_LP_R {
95 _0P1A_CNT_TARGET1_REACH_0_LP_R::new(((self.bits >> 15) & 1) != 0)
96 }
97 #[doc = "Bit 16 - reg_0p1a_0 counter after xpd reach target0"]
98 #[inline(always)]
99 pub fn _0p1a_cnt_target0_reach_1_lp(&self) -> _0P1A_CNT_TARGET0_REACH_1_LP_R {
100 _0P1A_CNT_TARGET0_REACH_1_LP_R::new(((self.bits >> 16) & 1) != 0)
101 }
102 #[doc = "Bit 17 - reg_0p1a_1_counter after xpd reach target1"]
103 #[inline(always)]
104 pub fn _0p1a_cnt_target1_reach_1_lp(&self) -> _0P1A_CNT_TARGET1_REACH_1_LP_R {
105 _0P1A_CNT_TARGET1_REACH_1_LP_R::new(((self.bits >> 17) & 1) != 0)
106 }
107 #[doc = "Bit 18 - reg_0p2a_0 counter after xpd reach target0"]
108 #[inline(always)]
109 pub fn _0p2a_cnt_target0_reach_0_lp(&self) -> _0P2A_CNT_TARGET0_REACH_0_LP_R {
110 _0P2A_CNT_TARGET0_REACH_0_LP_R::new(((self.bits >> 18) & 1) != 0)
111 }
112 #[doc = "Bit 19 - reg_0p2a_1_counter after xpd reach target1"]
113 #[inline(always)]
114 pub fn _0p2a_cnt_target1_reach_0_lp(&self) -> _0P2A_CNT_TARGET1_REACH_0_LP_R {
115 _0P2A_CNT_TARGET1_REACH_0_LP_R::new(((self.bits >> 19) & 1) != 0)
116 }
117 #[doc = "Bit 20 - reg_0p2a_0 counter after xpd reach target0"]
118 #[inline(always)]
119 pub fn _0p2a_cnt_target0_reach_1_lp(&self) -> _0P2A_CNT_TARGET0_REACH_1_LP_R {
120 _0P2A_CNT_TARGET0_REACH_1_LP_R::new(((self.bits >> 20) & 1) != 0)
121 }
122 #[doc = "Bit 21 - reg_0p2a_1_counter after xpd reach target1"]
123 #[inline(always)]
124 pub fn _0p2a_cnt_target1_reach_1_lp(&self) -> _0P2A_CNT_TARGET1_REACH_1_LP_R {
125 _0P2A_CNT_TARGET1_REACH_1_LP_R::new(((self.bits >> 21) & 1) != 0)
126 }
127 #[doc = "Bit 22 - reg_0p3a_0 counter after xpd reach target0"]
128 #[inline(always)]
129 pub fn _0p3a_cnt_target0_reach_0_lp(&self) -> _0P3A_CNT_TARGET0_REACH_0_LP_R {
130 _0P3A_CNT_TARGET0_REACH_0_LP_R::new(((self.bits >> 22) & 1) != 0)
131 }
132 #[doc = "Bit 23 - reg_0p3a_1_counter after xpd reach target1"]
133 #[inline(always)]
134 pub fn _0p3a_cnt_target1_reach_0_lp(&self) -> _0P3A_CNT_TARGET1_REACH_0_LP_R {
135 _0P3A_CNT_TARGET1_REACH_0_LP_R::new(((self.bits >> 23) & 1) != 0)
136 }
137 #[doc = "Bit 24 - reg_0p3a_0_counter after xpd reach target0"]
138 #[inline(always)]
139 pub fn _0p3a_cnt_target0_reach_1_lp(&self) -> _0P3A_CNT_TARGET0_REACH_1_LP_R {
140 _0P3A_CNT_TARGET0_REACH_1_LP_R::new(((self.bits >> 24) & 1) != 0)
141 }
142 #[doc = "Bit 25 - reg_0p3a_1_counter after xpd reach target1"]
143 #[inline(always)]
144 pub fn _0p3a_cnt_target1_reach_1_lp(&self) -> _0P3A_CNT_TARGET1_REACH_1_LP_R {
145 _0P3A_CNT_TARGET1_REACH_1_LP_R::new(((self.bits >> 25) & 1) != 0)
146 }
147 #[doc = "Bit 26 - need_des"]
148 #[inline(always)]
149 pub fn lp_cpu_wakeup(&self) -> LP_CPU_WAKEUP_R {
150 LP_CPU_WAKEUP_R::new(((self.bits >> 26) & 1) != 0)
151 }
152 #[doc = "Bit 27 - need_des"]
153 #[inline(always)]
154 pub fn sleep_switch_active_end(&self) -> SLEEP_SWITCH_ACTIVE_END_R {
155 SLEEP_SWITCH_ACTIVE_END_R::new(((self.bits >> 27) & 1) != 0)
156 }
157 #[doc = "Bit 28 - need_des"]
158 #[inline(always)]
159 pub fn active_switch_sleep_end(&self) -> ACTIVE_SWITCH_SLEEP_END_R {
160 ACTIVE_SWITCH_SLEEP_END_R::new(((self.bits >> 28) & 1) != 0)
161 }
162 #[doc = "Bit 29 - need_des"]
163 #[inline(always)]
164 pub fn sleep_switch_active_start(&self) -> SLEEP_SWITCH_ACTIVE_START_R {
165 SLEEP_SWITCH_ACTIVE_START_R::new(((self.bits >> 29) & 1) != 0)
166 }
167 #[doc = "Bit 30 - need_des"]
168 #[inline(always)]
169 pub fn active_switch_sleep_start(&self) -> ACTIVE_SWITCH_SLEEP_START_R {
170 ACTIVE_SWITCH_SLEEP_START_R::new(((self.bits >> 30) & 1) != 0)
171 }
172 #[doc = "Bit 31 - need_des"]
173 #[inline(always)]
174 pub fn hp_sw_trigger(&self) -> HP_SW_TRIGGER_R {
175 HP_SW_TRIGGER_R::new(((self.bits >> 31) & 1) != 0)
176 }
177}
178#[cfg(feature = "impl-register-debug")]
179impl core::fmt::Debug for R {
180 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
181 f.debug_struct("LP_INT_ENA")
182 .field(
183 "lp_cpu_sleep_reject",
184 &format_args!("{}", self.lp_cpu_sleep_reject().bit()),
185 )
186 .field(
187 "_0p1a_cnt_target0_reach_0_lp",
188 &format_args!("{}", self._0p1a_cnt_target0_reach_0_lp().bit()),
189 )
190 .field(
191 "_0p1a_cnt_target1_reach_0_lp",
192 &format_args!("{}", self._0p1a_cnt_target1_reach_0_lp().bit()),
193 )
194 .field(
195 "_0p1a_cnt_target0_reach_1_lp",
196 &format_args!("{}", self._0p1a_cnt_target0_reach_1_lp().bit()),
197 )
198 .field(
199 "_0p1a_cnt_target1_reach_1_lp",
200 &format_args!("{}", self._0p1a_cnt_target1_reach_1_lp().bit()),
201 )
202 .field(
203 "_0p2a_cnt_target0_reach_0_lp",
204 &format_args!("{}", self._0p2a_cnt_target0_reach_0_lp().bit()),
205 )
206 .field(
207 "_0p2a_cnt_target1_reach_0_lp",
208 &format_args!("{}", self._0p2a_cnt_target1_reach_0_lp().bit()),
209 )
210 .field(
211 "_0p2a_cnt_target0_reach_1_lp",
212 &format_args!("{}", self._0p2a_cnt_target0_reach_1_lp().bit()),
213 )
214 .field(
215 "_0p2a_cnt_target1_reach_1_lp",
216 &format_args!("{}", self._0p2a_cnt_target1_reach_1_lp().bit()),
217 )
218 .field(
219 "_0p3a_cnt_target0_reach_0_lp",
220 &format_args!("{}", self._0p3a_cnt_target0_reach_0_lp().bit()),
221 )
222 .field(
223 "_0p3a_cnt_target1_reach_0_lp",
224 &format_args!("{}", self._0p3a_cnt_target1_reach_0_lp().bit()),
225 )
226 .field(
227 "_0p3a_cnt_target0_reach_1_lp",
228 &format_args!("{}", self._0p3a_cnt_target0_reach_1_lp().bit()),
229 )
230 .field(
231 "_0p3a_cnt_target1_reach_1_lp",
232 &format_args!("{}", self._0p3a_cnt_target1_reach_1_lp().bit()),
233 )
234 .field(
235 "lp_cpu_wakeup",
236 &format_args!("{}", self.lp_cpu_wakeup().bit()),
237 )
238 .field(
239 "sleep_switch_active_end",
240 &format_args!("{}", self.sleep_switch_active_end().bit()),
241 )
242 .field(
243 "active_switch_sleep_end",
244 &format_args!("{}", self.active_switch_sleep_end().bit()),
245 )
246 .field(
247 "sleep_switch_active_start",
248 &format_args!("{}", self.sleep_switch_active_start().bit()),
249 )
250 .field(
251 "active_switch_sleep_start",
252 &format_args!("{}", self.active_switch_sleep_start().bit()),
253 )
254 .field(
255 "hp_sw_trigger",
256 &format_args!("{}", self.hp_sw_trigger().bit()),
257 )
258 .finish()
259 }
260}
261#[cfg(feature = "impl-register-debug")]
262impl core::fmt::Debug for crate::generic::Reg<LP_INT_ENA_SPEC> {
263 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
264 core::fmt::Debug::fmt(&self.read(), f)
265 }
266}
267impl W {
268 #[doc = "Bit 13 - need_des"]
269 #[inline(always)]
270 #[must_use]
271 pub fn lp_cpu_sleep_reject(&mut self) -> LP_CPU_SLEEP_REJECT_W<LP_INT_ENA_SPEC> {
272 LP_CPU_SLEEP_REJECT_W::new(self, 13)
273 }
274 #[doc = "Bit 14 - reg_0p1a_0_counter after xpd reach target0"]
275 #[inline(always)]
276 #[must_use]
277 pub fn _0p1a_cnt_target0_reach_0_lp(
278 &mut self,
279 ) -> _0P1A_CNT_TARGET0_REACH_0_LP_W<LP_INT_ENA_SPEC> {
280 _0P1A_CNT_TARGET0_REACH_0_LP_W::new(self, 14)
281 }
282 #[doc = "Bit 15 - reg_0p1a_1_counter after xpd reach target1"]
283 #[inline(always)]
284 #[must_use]
285 pub fn _0p1a_cnt_target1_reach_0_lp(
286 &mut self,
287 ) -> _0P1A_CNT_TARGET1_REACH_0_LP_W<LP_INT_ENA_SPEC> {
288 _0P1A_CNT_TARGET1_REACH_0_LP_W::new(self, 15)
289 }
290 #[doc = "Bit 16 - reg_0p1a_0 counter after xpd reach target0"]
291 #[inline(always)]
292 #[must_use]
293 pub fn _0p1a_cnt_target0_reach_1_lp(
294 &mut self,
295 ) -> _0P1A_CNT_TARGET0_REACH_1_LP_W<LP_INT_ENA_SPEC> {
296 _0P1A_CNT_TARGET0_REACH_1_LP_W::new(self, 16)
297 }
298 #[doc = "Bit 17 - reg_0p1a_1_counter after xpd reach target1"]
299 #[inline(always)]
300 #[must_use]
301 pub fn _0p1a_cnt_target1_reach_1_lp(
302 &mut self,
303 ) -> _0P1A_CNT_TARGET1_REACH_1_LP_W<LP_INT_ENA_SPEC> {
304 _0P1A_CNT_TARGET1_REACH_1_LP_W::new(self, 17)
305 }
306 #[doc = "Bit 18 - reg_0p2a_0 counter after xpd reach target0"]
307 #[inline(always)]
308 #[must_use]
309 pub fn _0p2a_cnt_target0_reach_0_lp(
310 &mut self,
311 ) -> _0P2A_CNT_TARGET0_REACH_0_LP_W<LP_INT_ENA_SPEC> {
312 _0P2A_CNT_TARGET0_REACH_0_LP_W::new(self, 18)
313 }
314 #[doc = "Bit 19 - reg_0p2a_1_counter after xpd reach target1"]
315 #[inline(always)]
316 #[must_use]
317 pub fn _0p2a_cnt_target1_reach_0_lp(
318 &mut self,
319 ) -> _0P2A_CNT_TARGET1_REACH_0_LP_W<LP_INT_ENA_SPEC> {
320 _0P2A_CNT_TARGET1_REACH_0_LP_W::new(self, 19)
321 }
322 #[doc = "Bit 20 - reg_0p2a_0 counter after xpd reach target0"]
323 #[inline(always)]
324 #[must_use]
325 pub fn _0p2a_cnt_target0_reach_1_lp(
326 &mut self,
327 ) -> _0P2A_CNT_TARGET0_REACH_1_LP_W<LP_INT_ENA_SPEC> {
328 _0P2A_CNT_TARGET0_REACH_1_LP_W::new(self, 20)
329 }
330 #[doc = "Bit 21 - reg_0p2a_1_counter after xpd reach target1"]
331 #[inline(always)]
332 #[must_use]
333 pub fn _0p2a_cnt_target1_reach_1_lp(
334 &mut self,
335 ) -> _0P2A_CNT_TARGET1_REACH_1_LP_W<LP_INT_ENA_SPEC> {
336 _0P2A_CNT_TARGET1_REACH_1_LP_W::new(self, 21)
337 }
338 #[doc = "Bit 22 - reg_0p3a_0 counter after xpd reach target0"]
339 #[inline(always)]
340 #[must_use]
341 pub fn _0p3a_cnt_target0_reach_0_lp(
342 &mut self,
343 ) -> _0P3A_CNT_TARGET0_REACH_0_LP_W<LP_INT_ENA_SPEC> {
344 _0P3A_CNT_TARGET0_REACH_0_LP_W::new(self, 22)
345 }
346 #[doc = "Bit 23 - reg_0p3a_1_counter after xpd reach target1"]
347 #[inline(always)]
348 #[must_use]
349 pub fn _0p3a_cnt_target1_reach_0_lp(
350 &mut self,
351 ) -> _0P3A_CNT_TARGET1_REACH_0_LP_W<LP_INT_ENA_SPEC> {
352 _0P3A_CNT_TARGET1_REACH_0_LP_W::new(self, 23)
353 }
354 #[doc = "Bit 24 - reg_0p3a_0_counter after xpd reach target0"]
355 #[inline(always)]
356 #[must_use]
357 pub fn _0p3a_cnt_target0_reach_1_lp(
358 &mut self,
359 ) -> _0P3A_CNT_TARGET0_REACH_1_LP_W<LP_INT_ENA_SPEC> {
360 _0P3A_CNT_TARGET0_REACH_1_LP_W::new(self, 24)
361 }
362 #[doc = "Bit 25 - reg_0p3a_1_counter after xpd reach target1"]
363 #[inline(always)]
364 #[must_use]
365 pub fn _0p3a_cnt_target1_reach_1_lp(
366 &mut self,
367 ) -> _0P3A_CNT_TARGET1_REACH_1_LP_W<LP_INT_ENA_SPEC> {
368 _0P3A_CNT_TARGET1_REACH_1_LP_W::new(self, 25)
369 }
370 #[doc = "Bit 26 - need_des"]
371 #[inline(always)]
372 #[must_use]
373 pub fn lp_cpu_wakeup(&mut self) -> LP_CPU_WAKEUP_W<LP_INT_ENA_SPEC> {
374 LP_CPU_WAKEUP_W::new(self, 26)
375 }
376 #[doc = "Bit 27 - need_des"]
377 #[inline(always)]
378 #[must_use]
379 pub fn sleep_switch_active_end(&mut self) -> SLEEP_SWITCH_ACTIVE_END_W<LP_INT_ENA_SPEC> {
380 SLEEP_SWITCH_ACTIVE_END_W::new(self, 27)
381 }
382 #[doc = "Bit 28 - need_des"]
383 #[inline(always)]
384 #[must_use]
385 pub fn active_switch_sleep_end(&mut self) -> ACTIVE_SWITCH_SLEEP_END_W<LP_INT_ENA_SPEC> {
386 ACTIVE_SWITCH_SLEEP_END_W::new(self, 28)
387 }
388 #[doc = "Bit 29 - need_des"]
389 #[inline(always)]
390 #[must_use]
391 pub fn sleep_switch_active_start(&mut self) -> SLEEP_SWITCH_ACTIVE_START_W<LP_INT_ENA_SPEC> {
392 SLEEP_SWITCH_ACTIVE_START_W::new(self, 29)
393 }
394 #[doc = "Bit 30 - need_des"]
395 #[inline(always)]
396 #[must_use]
397 pub fn active_switch_sleep_start(&mut self) -> ACTIVE_SWITCH_SLEEP_START_W<LP_INT_ENA_SPEC> {
398 ACTIVE_SWITCH_SLEEP_START_W::new(self, 30)
399 }
400 #[doc = "Bit 31 - need_des"]
401 #[inline(always)]
402 #[must_use]
403 pub fn hp_sw_trigger(&mut self) -> HP_SW_TRIGGER_W<LP_INT_ENA_SPEC> {
404 HP_SW_TRIGGER_W::new(self, 31)
405 }
406}
407#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lp_int_ena::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lp_int_ena::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
408pub struct LP_INT_ENA_SPEC;
409impl crate::RegisterSpec for LP_INT_ENA_SPEC {
410 type Ux = u32;
411}
412#[doc = "`read()` method returns [`lp_int_ena::R`](R) reader structure"]
413impl crate::Readable for LP_INT_ENA_SPEC {}
414#[doc = "`write(|w| ..)` method takes [`lp_int_ena::W`](W) writer structure"]
415impl crate::Writable for LP_INT_ENA_SPEC {
416 type Safety = crate::Unsafe;
417 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
418 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
419}
420#[doc = "`reset()` method sets LP_INT_ENA to value 0"]
421impl crate::Resettable for LP_INT_ENA_SPEC {
422 const RESET_VALUE: u32 = 0;
423}