esp32p4/mipi_dsi_host/
phy_if_cfg.rs

1#[doc = "Register `PHY_IF_CFG` reader"]
2pub type R = crate::R<PHY_IF_CFG_SPEC>;
3#[doc = "Register `PHY_IF_CFG` writer"]
4pub type W = crate::W<PHY_IF_CFG_SPEC>;
5#[doc = "Field `N_LANES` reader - NA"]
6pub type N_LANES_R = crate::FieldReader;
7#[doc = "Field `N_LANES` writer - NA"]
8pub type N_LANES_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `PHY_STOP_WAIT_TIME` reader - NA"]
10pub type PHY_STOP_WAIT_TIME_R = crate::FieldReader;
11#[doc = "Field `PHY_STOP_WAIT_TIME` writer - NA"]
12pub type PHY_STOP_WAIT_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13impl R {
14    #[doc = "Bits 0:1 - NA"]
15    #[inline(always)]
16    pub fn n_lanes(&self) -> N_LANES_R {
17        N_LANES_R::new((self.bits & 3) as u8)
18    }
19    #[doc = "Bits 8:15 - NA"]
20    #[inline(always)]
21    pub fn phy_stop_wait_time(&self) -> PHY_STOP_WAIT_TIME_R {
22        PHY_STOP_WAIT_TIME_R::new(((self.bits >> 8) & 0xff) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("PHY_IF_CFG")
29            .field("n_lanes", &format_args!("{}", self.n_lanes().bits()))
30            .field(
31                "phy_stop_wait_time",
32                &format_args!("{}", self.phy_stop_wait_time().bits()),
33            )
34            .finish()
35    }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<PHY_IF_CFG_SPEC> {
39    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40        core::fmt::Debug::fmt(&self.read(), f)
41    }
42}
43impl W {
44    #[doc = "Bits 0:1 - NA"]
45    #[inline(always)]
46    #[must_use]
47    pub fn n_lanes(&mut self) -> N_LANES_W<PHY_IF_CFG_SPEC> {
48        N_LANES_W::new(self, 0)
49    }
50    #[doc = "Bits 8:15 - NA"]
51    #[inline(always)]
52    #[must_use]
53    pub fn phy_stop_wait_time(&mut self) -> PHY_STOP_WAIT_TIME_W<PHY_IF_CFG_SPEC> {
54        PHY_STOP_WAIT_TIME_W::new(self, 8)
55    }
56}
57#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`phy_if_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`phy_if_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct PHY_IF_CFG_SPEC;
59impl crate::RegisterSpec for PHY_IF_CFG_SPEC {
60    type Ux = u32;
61}
62#[doc = "`read()` method returns [`phy_if_cfg::R`](R) reader structure"]
63impl crate::Readable for PHY_IF_CFG_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`phy_if_cfg::W`](W) writer structure"]
65impl crate::Writable for PHY_IF_CFG_SPEC {
66    type Safety = crate::Unsafe;
67    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets PHY_IF_CFG to value 0x01"]
71impl crate::Resettable for PHY_IF_CFG_SPEC {
72    const RESET_VALUE: u32 = 0x01;
73}
esp32p4/mipi_dsi_host/phy_if_cfg.rs

esp32p4/mipi_dsi_host/
phy_if_cfg.rs
