esp32p4/mipi_dsi_bridge/
phy_hs_loopback_ctrl.rs

1#[doc = "Register `PHY_HS_LOOPBACK_CTRL` reader"]
2pub type R = crate::R<PHY_HS_LOOPBACK_CTRL_SPEC>;
3#[doc = "Register `PHY_HS_LOOPBACK_CTRL` writer"]
4pub type W = crate::W<PHY_HS_LOOPBACK_CTRL_SPEC>;
5#[doc = "Field `PHY_HS_TXDATAHS_1` reader - txdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
6pub type PHY_HS_TXDATAHS_1_R = crate::FieldReader;
7#[doc = "Field `PHY_HS_TXDATAHS_1` writer - txdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
8pub type PHY_HS_TXDATAHS_1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `PHY_HS_TXREQUESTDATAHS_1` reader - txrequestdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
10pub type PHY_HS_TXREQUESTDATAHS_1_R = crate::BitReader;
11#[doc = "Field `PHY_HS_TXREQUESTDATAHS_1` writer - txrequestdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
12pub type PHY_HS_TXREQUESTDATAHS_1_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `PHY_HS_BASEDIR_1` reader - basedir_1 ctrl when enable dsi phy hs_loopback_test"]
14pub type PHY_HS_BASEDIR_1_R = crate::BitReader;
15#[doc = "Field `PHY_HS_BASEDIR_1` writer - basedir_1 ctrl when enable dsi phy hs_loopback_test"]
16pub type PHY_HS_BASEDIR_1_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `PHY_HS_TXDATAHS_0` reader - txdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
18pub type PHY_HS_TXDATAHS_0_R = crate::FieldReader;
19#[doc = "Field `PHY_HS_TXDATAHS_0` writer - txdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
20pub type PHY_HS_TXDATAHS_0_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
21#[doc = "Field `PHY_HS_TXREQUESTDATAHS_0` reader - txrequestdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
22pub type PHY_HS_TXREQUESTDATAHS_0_R = crate::BitReader;
23#[doc = "Field `PHY_HS_TXREQUESTDATAHS_0` writer - txrequestdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
24pub type PHY_HS_TXREQUESTDATAHS_0_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `PHY_HS_BASEDIR_0` reader - basedir_0 ctrl when enable dsi phy hs_loopback_test"]
26pub type PHY_HS_BASEDIR_0_R = crate::BitReader;
27#[doc = "Field `PHY_HS_BASEDIR_0` writer - basedir_0 ctrl when enable dsi phy hs_loopback_test"]
28pub type PHY_HS_BASEDIR_0_W<'a, REG> = crate::BitWriter<'a, REG>;
29#[doc = "Field `PHY_HS_TXREQUESTHSCLK` reader - txrequesthsclk when enable dsi phy hs_loopback_test"]
30pub type PHY_HS_TXREQUESTHSCLK_R = crate::BitReader;
31#[doc = "Field `PHY_HS_TXREQUESTHSCLK` writer - txrequesthsclk when enable dsi phy hs_loopback_test"]
32pub type PHY_HS_TXREQUESTHSCLK_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `PHY_HS_LOOPBACK_CHECK` writer - dsi phy hs_loopback test start check"]
34pub type PHY_HS_LOOPBACK_CHECK_W<'a, REG> = crate::BitWriter<'a, REG>;
35#[doc = "Field `PHY_HS_LOOPBACK_CHECK_DONE` reader - dsi phy hs_loopback test check done"]
36pub type PHY_HS_LOOPBACK_CHECK_DONE_R = crate::BitReader;
37#[doc = "Field `PHY_HS_LOOPBACK_EN` reader - dsi phy hs_loopback ctrl en"]
38pub type PHY_HS_LOOPBACK_EN_R = crate::BitReader;
39#[doc = "Field `PHY_HS_LOOPBACK_EN` writer - dsi phy hs_loopback ctrl en"]
40pub type PHY_HS_LOOPBACK_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `PHY_HS_LOOPBACK_OK` reader - result of dsi phy hs_loopback test"]
42pub type PHY_HS_LOOPBACK_OK_R = crate::BitReader;
43impl R {
44    #[doc = "Bits 0:7 - txdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
45    #[inline(always)]
46    pub fn phy_hs_txdatahs_1(&self) -> PHY_HS_TXDATAHS_1_R {
47        PHY_HS_TXDATAHS_1_R::new((self.bits & 0xff) as u8)
48    }
49    #[doc = "Bit 8 - txrequestdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
50    #[inline(always)]
51    pub fn phy_hs_txrequestdatahs_1(&self) -> PHY_HS_TXREQUESTDATAHS_1_R {
52        PHY_HS_TXREQUESTDATAHS_1_R::new(((self.bits >> 8) & 1) != 0)
53    }
54    #[doc = "Bit 9 - basedir_1 ctrl when enable dsi phy hs_loopback_test"]
55    #[inline(always)]
56    pub fn phy_hs_basedir_1(&self) -> PHY_HS_BASEDIR_1_R {
57        PHY_HS_BASEDIR_1_R::new(((self.bits >> 9) & 1) != 0)
58    }
59    #[doc = "Bits 16:23 - txdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
60    #[inline(always)]
61    pub fn phy_hs_txdatahs_0(&self) -> PHY_HS_TXDATAHS_0_R {
62        PHY_HS_TXDATAHS_0_R::new(((self.bits >> 16) & 0xff) as u8)
63    }
64    #[doc = "Bit 24 - txrequestdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
65    #[inline(always)]
66    pub fn phy_hs_txrequestdatahs_0(&self) -> PHY_HS_TXREQUESTDATAHS_0_R {
67        PHY_HS_TXREQUESTDATAHS_0_R::new(((self.bits >> 24) & 1) != 0)
68    }
69    #[doc = "Bit 25 - basedir_0 ctrl when enable dsi phy hs_loopback_test"]
70    #[inline(always)]
71    pub fn phy_hs_basedir_0(&self) -> PHY_HS_BASEDIR_0_R {
72        PHY_HS_BASEDIR_0_R::new(((self.bits >> 25) & 1) != 0)
73    }
74    #[doc = "Bit 27 - txrequesthsclk when enable dsi phy hs_loopback_test"]
75    #[inline(always)]
76    pub fn phy_hs_txrequesthsclk(&self) -> PHY_HS_TXREQUESTHSCLK_R {
77        PHY_HS_TXREQUESTHSCLK_R::new(((self.bits >> 27) & 1) != 0)
78    }
79    #[doc = "Bit 29 - dsi phy hs_loopback test check done"]
80    #[inline(always)]
81    pub fn phy_hs_loopback_check_done(&self) -> PHY_HS_LOOPBACK_CHECK_DONE_R {
82        PHY_HS_LOOPBACK_CHECK_DONE_R::new(((self.bits >> 29) & 1) != 0)
83    }
84    #[doc = "Bit 30 - dsi phy hs_loopback ctrl en"]
85    #[inline(always)]
86    pub fn phy_hs_loopback_en(&self) -> PHY_HS_LOOPBACK_EN_R {
87        PHY_HS_LOOPBACK_EN_R::new(((self.bits >> 30) & 1) != 0)
88    }
89    #[doc = "Bit 31 - result of dsi phy hs_loopback test"]
90    #[inline(always)]
91    pub fn phy_hs_loopback_ok(&self) -> PHY_HS_LOOPBACK_OK_R {
92        PHY_HS_LOOPBACK_OK_R::new(((self.bits >> 31) & 1) != 0)
93    }
94}
95#[cfg(feature = "impl-register-debug")]
96impl core::fmt::Debug for R {
97    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
98        f.debug_struct("PHY_HS_LOOPBACK_CTRL")
99            .field(
100                "phy_hs_txdatahs_1",
101                &format_args!("{}", self.phy_hs_txdatahs_1().bits()),
102            )
103            .field(
104                "phy_hs_txrequestdatahs_1",
105                &format_args!("{}", self.phy_hs_txrequestdatahs_1().bit()),
106            )
107            .field(
108                "phy_hs_basedir_1",
109                &format_args!("{}", self.phy_hs_basedir_1().bit()),
110            )
111            .field(
112                "phy_hs_txdatahs_0",
113                &format_args!("{}", self.phy_hs_txdatahs_0().bits()),
114            )
115            .field(
116                "phy_hs_txrequestdatahs_0",
117                &format_args!("{}", self.phy_hs_txrequestdatahs_0().bit()),
118            )
119            .field(
120                "phy_hs_basedir_0",
121                &format_args!("{}", self.phy_hs_basedir_0().bit()),
122            )
123            .field(
124                "phy_hs_txrequesthsclk",
125                &format_args!("{}", self.phy_hs_txrequesthsclk().bit()),
126            )
127            .field(
128                "phy_hs_loopback_check_done",
129                &format_args!("{}", self.phy_hs_loopback_check_done().bit()),
130            )
131            .field(
132                "phy_hs_loopback_en",
133                &format_args!("{}", self.phy_hs_loopback_en().bit()),
134            )
135            .field(
136                "phy_hs_loopback_ok",
137                &format_args!("{}", self.phy_hs_loopback_ok().bit()),
138            )
139            .finish()
140    }
141}
142#[cfg(feature = "impl-register-debug")]
143impl core::fmt::Debug for crate::generic::Reg<PHY_HS_LOOPBACK_CTRL_SPEC> {
144    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
145        core::fmt::Debug::fmt(&self.read(), f)
146    }
147}
148impl W {
149    #[doc = "Bits 0:7 - txdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
150    #[inline(always)]
151    #[must_use]
152    pub fn phy_hs_txdatahs_1(&mut self) -> PHY_HS_TXDATAHS_1_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
153        PHY_HS_TXDATAHS_1_W::new(self, 0)
154    }
155    #[doc = "Bit 8 - txrequestdatahs_1 ctrl when enable dsi phy hs_loopback_test"]
156    #[inline(always)]
157    #[must_use]
158    pub fn phy_hs_txrequestdatahs_1(
159        &mut self,
160    ) -> PHY_HS_TXREQUESTDATAHS_1_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
161        PHY_HS_TXREQUESTDATAHS_1_W::new(self, 8)
162    }
163    #[doc = "Bit 9 - basedir_1 ctrl when enable dsi phy hs_loopback_test"]
164    #[inline(always)]
165    #[must_use]
166    pub fn phy_hs_basedir_1(&mut self) -> PHY_HS_BASEDIR_1_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
167        PHY_HS_BASEDIR_1_W::new(self, 9)
168    }
169    #[doc = "Bits 16:23 - txdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
170    #[inline(always)]
171    #[must_use]
172    pub fn phy_hs_txdatahs_0(&mut self) -> PHY_HS_TXDATAHS_0_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
173        PHY_HS_TXDATAHS_0_W::new(self, 16)
174    }
175    #[doc = "Bit 24 - txrequestdatahs_0 ctrl when enable dsi phy hs_loopback_test"]
176    #[inline(always)]
177    #[must_use]
178    pub fn phy_hs_txrequestdatahs_0(
179        &mut self,
180    ) -> PHY_HS_TXREQUESTDATAHS_0_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
181        PHY_HS_TXREQUESTDATAHS_0_W::new(self, 24)
182    }
183    #[doc = "Bit 25 - basedir_0 ctrl when enable dsi phy hs_loopback_test"]
184    #[inline(always)]
185    #[must_use]
186    pub fn phy_hs_basedir_0(&mut self) -> PHY_HS_BASEDIR_0_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
187        PHY_HS_BASEDIR_0_W::new(self, 25)
188    }
189    #[doc = "Bit 27 - txrequesthsclk when enable dsi phy hs_loopback_test"]
190    #[inline(always)]
191    #[must_use]
192    pub fn phy_hs_txrequesthsclk(&mut self) -> PHY_HS_TXREQUESTHSCLK_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
193        PHY_HS_TXREQUESTHSCLK_W::new(self, 27)
194    }
195    #[doc = "Bit 28 - dsi phy hs_loopback test start check"]
196    #[inline(always)]
197    #[must_use]
198    pub fn phy_hs_loopback_check(&mut self) -> PHY_HS_LOOPBACK_CHECK_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
199        PHY_HS_LOOPBACK_CHECK_W::new(self, 28)
200    }
201    #[doc = "Bit 30 - dsi phy hs_loopback ctrl en"]
202    #[inline(always)]
203    #[must_use]
204    pub fn phy_hs_loopback_en(&mut self) -> PHY_HS_LOOPBACK_EN_W<PHY_HS_LOOPBACK_CTRL_SPEC> {
205        PHY_HS_LOOPBACK_EN_W::new(self, 30)
206    }
207}
208#[doc = "dsi phy hp_loopback test ctrl\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`phy_hs_loopback_ctrl::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`phy_hs_loopback_ctrl::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
209pub struct PHY_HS_LOOPBACK_CTRL_SPEC;
210impl crate::RegisterSpec for PHY_HS_LOOPBACK_CTRL_SPEC {
211    type Ux = u32;
212}
213#[doc = "`read()` method returns [`phy_hs_loopback_ctrl::R`](R) reader structure"]
214impl crate::Readable for PHY_HS_LOOPBACK_CTRL_SPEC {}
215#[doc = "`write(|w| ..)` method takes [`phy_hs_loopback_ctrl::W`](W) writer structure"]
216impl crate::Writable for PHY_HS_LOOPBACK_CTRL_SPEC {
217    type Safety = crate::Unsafe;
218    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
219    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
220}
221#[doc = "`reset()` method sets PHY_HS_LOOPBACK_CTRL to value 0x0200"]
222impl crate::Resettable for PHY_HS_LOOPBACK_CTRL_SPEC {
223    const RESET_VALUE: u32 = 0x0200;
224}
esp32p4/mipi_dsi_bridge/phy_hs_loopback_ctrl.rs

esp32p4/mipi_dsi_bridge/
phy_hs_loopback_ctrl.rs
