esp32p4/mipi_csi_host/
int_st_seq_frame_fatal.rs

1#[doc = "Register `INT_ST_SEQ_FRAME_FATAL` reader"]
2pub type R = crate::R<INT_ST_SEQ_FRAME_FATAL_SPEC>;
3#[doc = "Field `ST_ERR_F_SEQ_VC0` reader - NA"]
4pub type ST_ERR_F_SEQ_VC0_R = crate::BitReader;
5#[doc = "Field `ST_ERR_F_SEQ_VC1` reader - NA"]
6pub type ST_ERR_F_SEQ_VC1_R = crate::BitReader;
7#[doc = "Field `ST_ERR_F_SEQ_VC2` reader - NA"]
8pub type ST_ERR_F_SEQ_VC2_R = crate::BitReader;
9#[doc = "Field `ST_ERR_F_SEQ_VC3` reader - NA"]
10pub type ST_ERR_F_SEQ_VC3_R = crate::BitReader;
11#[doc = "Field `ST_ERR_F_SEQ_VC4` reader - NA"]
12pub type ST_ERR_F_SEQ_VC4_R = crate::BitReader;
13#[doc = "Field `ST_ERR_F_SEQ_VC5` reader - NA"]
14pub type ST_ERR_F_SEQ_VC5_R = crate::BitReader;
15#[doc = "Field `ST_ERR_F_SEQ_VC6` reader - NA"]
16pub type ST_ERR_F_SEQ_VC6_R = crate::BitReader;
17#[doc = "Field `ST_ERR_F_SEQ_VC7` reader - NA"]
18pub type ST_ERR_F_SEQ_VC7_R = crate::BitReader;
19#[doc = "Field `ST_ERR_F_SEQ_VC8` reader - NA"]
20pub type ST_ERR_F_SEQ_VC8_R = crate::BitReader;
21#[doc = "Field `ST_ERR_F_SEQ_VC9` reader - NA"]
22pub type ST_ERR_F_SEQ_VC9_R = crate::BitReader;
23#[doc = "Field `ST_ERR_F_SEQ_VC10` reader - NA"]
24pub type ST_ERR_F_SEQ_VC10_R = crate::BitReader;
25#[doc = "Field `ST_ERR_F_SEQ_VC11` reader - NA"]
26pub type ST_ERR_F_SEQ_VC11_R = crate::BitReader;
27#[doc = "Field `ST_ERR_F_SEQ_VC12` reader - NA"]
28pub type ST_ERR_F_SEQ_VC12_R = crate::BitReader;
29#[doc = "Field `ST_ERR_F_SEQ_VC13` reader - NA"]
30pub type ST_ERR_F_SEQ_VC13_R = crate::BitReader;
31#[doc = "Field `ST_ERR_F_SEQ_VC14` reader - NA"]
32pub type ST_ERR_F_SEQ_VC14_R = crate::BitReader;
33#[doc = "Field `ST_ERR_F_SEQ_VC15` reader - NA"]
34pub type ST_ERR_F_SEQ_VC15_R = crate::BitReader;
35impl R {
36    #[doc = "Bit 0 - NA"]
37    #[inline(always)]
38    pub fn st_err_f_seq_vc0(&self) -> ST_ERR_F_SEQ_VC0_R {
39        ST_ERR_F_SEQ_VC0_R::new((self.bits & 1) != 0)
40    }
41    #[doc = "Bit 1 - NA"]
42    #[inline(always)]
43    pub fn st_err_f_seq_vc1(&self) -> ST_ERR_F_SEQ_VC1_R {
44        ST_ERR_F_SEQ_VC1_R::new(((self.bits >> 1) & 1) != 0)
45    }
46    #[doc = "Bit 2 - NA"]
47    #[inline(always)]
48    pub fn st_err_f_seq_vc2(&self) -> ST_ERR_F_SEQ_VC2_R {
49        ST_ERR_F_SEQ_VC2_R::new(((self.bits >> 2) & 1) != 0)
50    }
51    #[doc = "Bit 3 - NA"]
52    #[inline(always)]
53    pub fn st_err_f_seq_vc3(&self) -> ST_ERR_F_SEQ_VC3_R {
54        ST_ERR_F_SEQ_VC3_R::new(((self.bits >> 3) & 1) != 0)
55    }
56    #[doc = "Bit 4 - NA"]
57    #[inline(always)]
58    pub fn st_err_f_seq_vc4(&self) -> ST_ERR_F_SEQ_VC4_R {
59        ST_ERR_F_SEQ_VC4_R::new(((self.bits >> 4) & 1) != 0)
60    }
61    #[doc = "Bit 5 - NA"]
62    #[inline(always)]
63    pub fn st_err_f_seq_vc5(&self) -> ST_ERR_F_SEQ_VC5_R {
64        ST_ERR_F_SEQ_VC5_R::new(((self.bits >> 5) & 1) != 0)
65    }
66    #[doc = "Bit 6 - NA"]
67    #[inline(always)]
68    pub fn st_err_f_seq_vc6(&self) -> ST_ERR_F_SEQ_VC6_R {
69        ST_ERR_F_SEQ_VC6_R::new(((self.bits >> 6) & 1) != 0)
70    }
71    #[doc = "Bit 7 - NA"]
72    #[inline(always)]
73    pub fn st_err_f_seq_vc7(&self) -> ST_ERR_F_SEQ_VC7_R {
74        ST_ERR_F_SEQ_VC7_R::new(((self.bits >> 7) & 1) != 0)
75    }
76    #[doc = "Bit 8 - NA"]
77    #[inline(always)]
78    pub fn st_err_f_seq_vc8(&self) -> ST_ERR_F_SEQ_VC8_R {
79        ST_ERR_F_SEQ_VC8_R::new(((self.bits >> 8) & 1) != 0)
80    }
81    #[doc = "Bit 9 - NA"]
82    #[inline(always)]
83    pub fn st_err_f_seq_vc9(&self) -> ST_ERR_F_SEQ_VC9_R {
84        ST_ERR_F_SEQ_VC9_R::new(((self.bits >> 9) & 1) != 0)
85    }
86    #[doc = "Bit 10 - NA"]
87    #[inline(always)]
88    pub fn st_err_f_seq_vc10(&self) -> ST_ERR_F_SEQ_VC10_R {
89        ST_ERR_F_SEQ_VC10_R::new(((self.bits >> 10) & 1) != 0)
90    }
91    #[doc = "Bit 11 - NA"]
92    #[inline(always)]
93    pub fn st_err_f_seq_vc11(&self) -> ST_ERR_F_SEQ_VC11_R {
94        ST_ERR_F_SEQ_VC11_R::new(((self.bits >> 11) & 1) != 0)
95    }
96    #[doc = "Bit 12 - NA"]
97    #[inline(always)]
98    pub fn st_err_f_seq_vc12(&self) -> ST_ERR_F_SEQ_VC12_R {
99        ST_ERR_F_SEQ_VC12_R::new(((self.bits >> 12) & 1) != 0)
100    }
101    #[doc = "Bit 13 - NA"]
102    #[inline(always)]
103    pub fn st_err_f_seq_vc13(&self) -> ST_ERR_F_SEQ_VC13_R {
104        ST_ERR_F_SEQ_VC13_R::new(((self.bits >> 13) & 1) != 0)
105    }
106    #[doc = "Bit 14 - NA"]
107    #[inline(always)]
108    pub fn st_err_f_seq_vc14(&self) -> ST_ERR_F_SEQ_VC14_R {
109        ST_ERR_F_SEQ_VC14_R::new(((self.bits >> 14) & 1) != 0)
110    }
111    #[doc = "Bit 15 - NA"]
112    #[inline(always)]
113    pub fn st_err_f_seq_vc15(&self) -> ST_ERR_F_SEQ_VC15_R {
114        ST_ERR_F_SEQ_VC15_R::new(((self.bits >> 15) & 1) != 0)
115    }
116}
117#[cfg(feature = "impl-register-debug")]
118impl core::fmt::Debug for R {
119    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
120        f.debug_struct("INT_ST_SEQ_FRAME_FATAL")
121            .field(
122                "st_err_f_seq_vc0",
123                &format_args!("{}", self.st_err_f_seq_vc0().bit()),
124            )
125            .field(
126                "st_err_f_seq_vc1",
127                &format_args!("{}", self.st_err_f_seq_vc1().bit()),
128            )
129            .field(
130                "st_err_f_seq_vc2",
131                &format_args!("{}", self.st_err_f_seq_vc2().bit()),
132            )
133            .field(
134                "st_err_f_seq_vc3",
135                &format_args!("{}", self.st_err_f_seq_vc3().bit()),
136            )
137            .field(
138                "st_err_f_seq_vc4",
139                &format_args!("{}", self.st_err_f_seq_vc4().bit()),
140            )
141            .field(
142                "st_err_f_seq_vc5",
143                &format_args!("{}", self.st_err_f_seq_vc5().bit()),
144            )
145            .field(
146                "st_err_f_seq_vc6",
147                &format_args!("{}", self.st_err_f_seq_vc6().bit()),
148            )
149            .field(
150                "st_err_f_seq_vc7",
151                &format_args!("{}", self.st_err_f_seq_vc7().bit()),
152            )
153            .field(
154                "st_err_f_seq_vc8",
155                &format_args!("{}", self.st_err_f_seq_vc8().bit()),
156            )
157            .field(
158                "st_err_f_seq_vc9",
159                &format_args!("{}", self.st_err_f_seq_vc9().bit()),
160            )
161            .field(
162                "st_err_f_seq_vc10",
163                &format_args!("{}", self.st_err_f_seq_vc10().bit()),
164            )
165            .field(
166                "st_err_f_seq_vc11",
167                &format_args!("{}", self.st_err_f_seq_vc11().bit()),
168            )
169            .field(
170                "st_err_f_seq_vc12",
171                &format_args!("{}", self.st_err_f_seq_vc12().bit()),
172            )
173            .field(
174                "st_err_f_seq_vc13",
175                &format_args!("{}", self.st_err_f_seq_vc13().bit()),
176            )
177            .field(
178                "st_err_f_seq_vc14",
179                &format_args!("{}", self.st_err_f_seq_vc14().bit()),
180            )
181            .field(
182                "st_err_f_seq_vc15",
183                &format_args!("{}", self.st_err_f_seq_vc15().bit()),
184            )
185            .finish()
186    }
187}
188#[cfg(feature = "impl-register-debug")]
189impl core::fmt::Debug for crate::generic::Reg<INT_ST_SEQ_FRAME_FATAL_SPEC> {
190    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
191        core::fmt::Debug::fmt(&self.read(), f)
192    }
193}
194#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st_seq_frame_fatal::R`](R).  See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
195pub struct INT_ST_SEQ_FRAME_FATAL_SPEC;
196impl crate::RegisterSpec for INT_ST_SEQ_FRAME_FATAL_SPEC {
197    type Ux = u32;
198}
199#[doc = "`read()` method returns [`int_st_seq_frame_fatal::R`](R) reader structure"]
200impl crate::Readable for INT_ST_SEQ_FRAME_FATAL_SPEC {}
201#[doc = "`reset()` method sets INT_ST_SEQ_FRAME_FATAL to value 0"]
202impl crate::Resettable for INT_ST_SEQ_FRAME_FATAL_SPEC {
203    const RESET_VALUE: u32 = 0;
204}
esp32p4/mipi_csi_host/int_st_seq_frame_fatal.rs

esp32p4/mipi_csi_host/
int_st_seq_frame_fatal.rs
