esp32p4/mcpwm0/timer/
cfg0.rs

1#[doc = "Register `CFG0` reader"]
2pub type R = crate::R<CFG0_SPEC>;
3#[doc = "Register `CFG0` writer"]
4pub type W = crate::W<CFG0_SPEC>;
5#[doc = "Field `PRESCALE` reader - Configures the prescaler value of timer%s, so that the period of PT0_clk = Period of PWM_clk * (PWM_TIMER%s_PRESCALE + 1)"]
6pub type PRESCALE_R = crate::FieldReader;
7#[doc = "Field `PRESCALE` writer - Configures the prescaler value of timer%s, so that the period of PT0_clk = Period of PWM_clk * (PWM_TIMER%s_PRESCALE + 1)"]
8pub type PRESCALE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
9#[doc = "Field `PERIOD` reader - Configures the period shadow of PWM timer%s"]
10pub type PERIOD_R = crate::FieldReader<u16>;
11#[doc = "Field `PERIOD` writer - Configures the period shadow of PWM timer%s"]
12pub type PERIOD_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
13#[doc = "Field `PERIOD_UPMETHOD` reader - Configures the update method for active register of PWM timer%s period.\\\\0: Immediate\\\\1: TEZ\\\\2: Sync\\\\3: TEZ or sync\\\\TEZ here and below means timer equal zero event"]
14pub type PERIOD_UPMETHOD_R = crate::FieldReader;
15#[doc = "Field `PERIOD_UPMETHOD` writer - Configures the update method for active register of PWM timer%s period.\\\\0: Immediate\\\\1: TEZ\\\\2: Sync\\\\3: TEZ or sync\\\\TEZ here and below means timer equal zero event"]
16pub type PERIOD_UPMETHOD_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
17impl R {
18    #[doc = "Bits 0:7 - Configures the prescaler value of timer%s, so that the period of PT0_clk = Period of PWM_clk * (PWM_TIMER%s_PRESCALE + 1)"]
19    #[inline(always)]
20    pub fn prescale(&self) -> PRESCALE_R {
21        PRESCALE_R::new((self.bits & 0xff) as u8)
22    }
23    #[doc = "Bits 8:23 - Configures the period shadow of PWM timer%s"]
24    #[inline(always)]
25    pub fn period(&self) -> PERIOD_R {
26        PERIOD_R::new(((self.bits >> 8) & 0xffff) as u16)
27    }
28    #[doc = "Bits 24:25 - Configures the update method for active register of PWM timer%s period.\\\\0: Immediate\\\\1: TEZ\\\\2: Sync\\\\3: TEZ or sync\\\\TEZ here and below means timer equal zero event"]
29    #[inline(always)]
30    pub fn period_upmethod(&self) -> PERIOD_UPMETHOD_R {
31        PERIOD_UPMETHOD_R::new(((self.bits >> 24) & 3) as u8)
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for R {
36    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
37        f.debug_struct("CFG0")
38            .field("prescale", &format_args!("{}", self.prescale().bits()))
39            .field("period", &format_args!("{}", self.period().bits()))
40            .field(
41                "period_upmethod",
42                &format_args!("{}", self.period_upmethod().bits()),
43            )
44            .finish()
45    }
46}
47#[cfg(feature = "impl-register-debug")]
48impl core::fmt::Debug for crate::generic::Reg<CFG0_SPEC> {
49    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
50        core::fmt::Debug::fmt(&self.read(), f)
51    }
52}
53impl W {
54    #[doc = "Bits 0:7 - Configures the prescaler value of timer%s, so that the period of PT0_clk = Period of PWM_clk * (PWM_TIMER%s_PRESCALE + 1)"]
55    #[inline(always)]
56    #[must_use]
57    pub fn prescale(&mut self) -> PRESCALE_W<CFG0_SPEC> {
58        PRESCALE_W::new(self, 0)
59    }
60    #[doc = "Bits 8:23 - Configures the period shadow of PWM timer%s"]
61    #[inline(always)]
62    #[must_use]
63    pub fn period(&mut self) -> PERIOD_W<CFG0_SPEC> {
64        PERIOD_W::new(self, 8)
65    }
66    #[doc = "Bits 24:25 - Configures the update method for active register of PWM timer%s period.\\\\0: Immediate\\\\1: TEZ\\\\2: Sync\\\\3: TEZ or sync\\\\TEZ here and below means timer equal zero event"]
67    #[inline(always)]
68    #[must_use]
69    pub fn period_upmethod(&mut self) -> PERIOD_UPMETHOD_W<CFG0_SPEC> {
70        PERIOD_UPMETHOD_W::new(self, 24)
71    }
72}
73#[doc = "PWM timer0 period and update method configuration register.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`cfg0::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`cfg0::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
74pub struct CFG0_SPEC;
75impl crate::RegisterSpec for CFG0_SPEC {
76    type Ux = u32;
77}
78#[doc = "`read()` method returns [`cfg0::R`](R) reader structure"]
79impl crate::Readable for CFG0_SPEC {}
80#[doc = "`write(|w| ..)` method takes [`cfg0::W`](W) writer structure"]
81impl crate::Writable for CFG0_SPEC {
82    type Safety = crate::Unsafe;
83    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
84    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
85}
86#[doc = "`reset()` method sets CFG0 to value 0xff00"]
87impl crate::Resettable for CFG0_SPEC {
88    const RESET_VALUE: u32 = 0xff00;
89}
esp32p4/mcpwm0/timer/cfg0.rs

esp32p4/mcpwm0/timer/
cfg0.rs
