esp32p4/lp_timer/
lp_int_raw.rs

1#[doc = "Register `LP_INT_RAW` reader"]
2pub type R = crate::R<LP_INT_RAW_SPEC>;
3#[doc = "Register `LP_INT_RAW` writer"]
4pub type W = crate::W<LP_INT_RAW_SPEC>;
5#[doc = "Field `MAIN_TIMER_OVERFLOW` reader - need_des"]
6pub type MAIN_TIMER_OVERFLOW_R = crate::BitReader;
7#[doc = "Field `MAIN_TIMER_OVERFLOW` writer - need_des"]
8pub type MAIN_TIMER_OVERFLOW_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `MAIN_TIMER` reader - need_des"]
10pub type MAIN_TIMER_R = crate::BitReader;
11#[doc = "Field `MAIN_TIMER` writer - need_des"]
12pub type MAIN_TIMER_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bit 30 - need_des"]
15    #[inline(always)]
16    pub fn main_timer_overflow(&self) -> MAIN_TIMER_OVERFLOW_R {
17        MAIN_TIMER_OVERFLOW_R::new(((self.bits >> 30) & 1) != 0)
18    }
19    #[doc = "Bit 31 - need_des"]
20    #[inline(always)]
21    pub fn main_timer(&self) -> MAIN_TIMER_R {
22        MAIN_TIMER_R::new(((self.bits >> 31) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("LP_INT_RAW")
29            .field(
30                "main_timer_overflow",
31                &format_args!("{}", self.main_timer_overflow().bit()),
32            )
33            .field("main_timer", &format_args!("{}", self.main_timer().bit()))
34            .finish()
35    }
36}
37#[cfg(feature = "impl-register-debug")]
38impl core::fmt::Debug for crate::generic::Reg<LP_INT_RAW_SPEC> {
39    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
40        core::fmt::Debug::fmt(&self.read(), f)
41    }
42}
43impl W {
44    #[doc = "Bit 30 - need_des"]
45    #[inline(always)]
46    #[must_use]
47    pub fn main_timer_overflow(&mut self) -> MAIN_TIMER_OVERFLOW_W<LP_INT_RAW_SPEC> {
48        MAIN_TIMER_OVERFLOW_W::new(self, 30)
49    }
50    #[doc = "Bit 31 - need_des"]
51    #[inline(always)]
52    #[must_use]
53    pub fn main_timer(&mut self) -> MAIN_TIMER_W<LP_INT_RAW_SPEC> {
54        MAIN_TIMER_W::new(self, 31)
55    }
56}
57#[doc = "need_des\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lp_int_raw::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lp_int_raw::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
58pub struct LP_INT_RAW_SPEC;
59impl crate::RegisterSpec for LP_INT_RAW_SPEC {
60    type Ux = u32;
61}
62#[doc = "`read()` method returns [`lp_int_raw::R`](R) reader structure"]
63impl crate::Readable for LP_INT_RAW_SPEC {}
64#[doc = "`write(|w| ..)` method takes [`lp_int_raw::W`](W) writer structure"]
65impl crate::Writable for LP_INT_RAW_SPEC {
66    type Safety = crate::Unsafe;
67    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
68    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
69}
70#[doc = "`reset()` method sets LP_INT_RAW to value 0"]
71impl crate::Resettable for LP_INT_RAW_SPEC {
72    const RESET_VALUE: u32 = 0;
73}
esp32p4/lp_timer/lp_int_raw.rs

esp32p4/lp_timer/
lp_int_raw.rs
