esp32p4/lp_gpio/
func12_out_sel_cfg.rs

1#[doc = "Register `FUNC12_OUT_SEL_CFG` reader"]
2pub type R = crate::R<FUNC12_OUT_SEL_CFG_SPEC>;
3#[doc = "Register `FUNC12_OUT_SEL_CFG` writer"]
4pub type W = crate::W<FUNC12_OUT_SEL_CFG_SPEC>;
5#[doc = "Field `REG_GPIO_FUNC12_OE_INV_SEL` reader - Reserved"]
6pub type REG_GPIO_FUNC12_OE_INV_SEL_R = crate::BitReader;
7#[doc = "Field `REG_GPIO_FUNC12_OE_INV_SEL` writer - Reserved"]
8pub type REG_GPIO_FUNC12_OE_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `REG_GPIO_FUNC12_OE_SEL` reader - Reserved"]
10pub type REG_GPIO_FUNC12_OE_SEL_R = crate::BitReader;
11#[doc = "Field `REG_GPIO_FUNC12_OE_SEL` writer - Reserved"]
12pub type REG_GPIO_FUNC12_OE_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `REG_GPIO_FUNC12_OUT_INV_SEL` reader - Reserved"]
14pub type REG_GPIO_FUNC12_OUT_INV_SEL_R = crate::BitReader;
15#[doc = "Field `REG_GPIO_FUNC12_OUT_INV_SEL` writer - Reserved"]
16pub type REG_GPIO_FUNC12_OUT_INV_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `REG_GPIO_FUNC12_OUT_SEL` reader - Reserved"]
18pub type REG_GPIO_FUNC12_OUT_SEL_R = crate::FieldReader;
19#[doc = "Field `REG_GPIO_FUNC12_OUT_SEL` writer - Reserved"]
20pub type REG_GPIO_FUNC12_OUT_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 6>;
21impl R {
22    #[doc = "Bit 0 - Reserved"]
23    #[inline(always)]
24    pub fn reg_gpio_func12_oe_inv_sel(&self) -> REG_GPIO_FUNC12_OE_INV_SEL_R {
25        REG_GPIO_FUNC12_OE_INV_SEL_R::new((self.bits & 1) != 0)
26    }
27    #[doc = "Bit 1 - Reserved"]
28    #[inline(always)]
29    pub fn reg_gpio_func12_oe_sel(&self) -> REG_GPIO_FUNC12_OE_SEL_R {
30        REG_GPIO_FUNC12_OE_SEL_R::new(((self.bits >> 1) & 1) != 0)
31    }
32    #[doc = "Bit 2 - Reserved"]
33    #[inline(always)]
34    pub fn reg_gpio_func12_out_inv_sel(&self) -> REG_GPIO_FUNC12_OUT_INV_SEL_R {
35        REG_GPIO_FUNC12_OUT_INV_SEL_R::new(((self.bits >> 2) & 1) != 0)
36    }
37    #[doc = "Bits 3:8 - Reserved"]
38    #[inline(always)]
39    pub fn reg_gpio_func12_out_sel(&self) -> REG_GPIO_FUNC12_OUT_SEL_R {
40        REG_GPIO_FUNC12_OUT_SEL_R::new(((self.bits >> 3) & 0x3f) as u8)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("FUNC12_OUT_SEL_CFG")
47            .field(
48                "reg_gpio_func12_oe_inv_sel",
49                &format_args!("{}", self.reg_gpio_func12_oe_inv_sel().bit()),
50            )
51            .field(
52                "reg_gpio_func12_oe_sel",
53                &format_args!("{}", self.reg_gpio_func12_oe_sel().bit()),
54            )
55            .field(
56                "reg_gpio_func12_out_inv_sel",
57                &format_args!("{}", self.reg_gpio_func12_out_inv_sel().bit()),
58            )
59            .field(
60                "reg_gpio_func12_out_sel",
61                &format_args!("{}", self.reg_gpio_func12_out_sel().bits()),
62            )
63            .finish()
64    }
65}
66#[cfg(feature = "impl-register-debug")]
67impl core::fmt::Debug for crate::generic::Reg<FUNC12_OUT_SEL_CFG_SPEC> {
68    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
69        core::fmt::Debug::fmt(&self.read(), f)
70    }
71}
72impl W {
73    #[doc = "Bit 0 - Reserved"]
74    #[inline(always)]
75    #[must_use]
76    pub fn reg_gpio_func12_oe_inv_sel(
77        &mut self,
78    ) -> REG_GPIO_FUNC12_OE_INV_SEL_W<FUNC12_OUT_SEL_CFG_SPEC> {
79        REG_GPIO_FUNC12_OE_INV_SEL_W::new(self, 0)
80    }
81    #[doc = "Bit 1 - Reserved"]
82    #[inline(always)]
83    #[must_use]
84    pub fn reg_gpio_func12_oe_sel(&mut self) -> REG_GPIO_FUNC12_OE_SEL_W<FUNC12_OUT_SEL_CFG_SPEC> {
85        REG_GPIO_FUNC12_OE_SEL_W::new(self, 1)
86    }
87    #[doc = "Bit 2 - Reserved"]
88    #[inline(always)]
89    #[must_use]
90    pub fn reg_gpio_func12_out_inv_sel(
91        &mut self,
92    ) -> REG_GPIO_FUNC12_OUT_INV_SEL_W<FUNC12_OUT_SEL_CFG_SPEC> {
93        REG_GPIO_FUNC12_OUT_INV_SEL_W::new(self, 2)
94    }
95    #[doc = "Bits 3:8 - Reserved"]
96    #[inline(always)]
97    #[must_use]
98    pub fn reg_gpio_func12_out_sel(
99        &mut self,
100    ) -> REG_GPIO_FUNC12_OUT_SEL_W<FUNC12_OUT_SEL_CFG_SPEC> {
101        REG_GPIO_FUNC12_OUT_SEL_W::new(self, 3)
102    }
103}
104#[doc = "Reserved\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`func12_out_sel_cfg::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`func12_out_sel_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
105pub struct FUNC12_OUT_SEL_CFG_SPEC;
106impl crate::RegisterSpec for FUNC12_OUT_SEL_CFG_SPEC {
107    type Ux = u32;
108}
109#[doc = "`read()` method returns [`func12_out_sel_cfg::R`](R) reader structure"]
110impl crate::Readable for FUNC12_OUT_SEL_CFG_SPEC {}
111#[doc = "`write(|w| ..)` method takes [`func12_out_sel_cfg::W`](W) writer structure"]
112impl crate::Writable for FUNC12_OUT_SEL_CFG_SPEC {
113    type Safety = crate::Unsafe;
114    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
115    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
116}
117#[doc = "`reset()` method sets FUNC12_OUT_SEL_CFG to value 0x0100"]
118impl crate::Resettable for FUNC12_OUT_SEL_CFG_SPEC {
119    const RESET_VALUE: u32 = 0x0100;
120}
esp32p4/lp_gpio/func12_out_sel_cfg.rs

esp32p4/lp_gpio/
func12_out_sel_cfg.rs
