1#[doc = "Register `INT_RAW` reader"]
2pub type R = crate::R<INT_RAW_SPEC>;
3#[doc = "Register `INT_RAW` writer"]
4pub type W = crate::W<INT_RAW_SPEC>;
5#[doc = "Field `TIMER_OVF(0-3)` reader - Triggered when the timer%s has reached its maximum counter value."]
6pub type TIMER_OVF_R = crate::BitReader;
7#[doc = "Field `TIMER_OVF(0-3)` writer - Triggered when the timer%s has reached its maximum counter value."]
8pub type TIMER_OVF_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `DUTY_CHNG_END_CH(0-7)` reader - Interrupt raw bit for channel %s. Triggered when the gradual change of duty has finished."]
10pub type DUTY_CHNG_END_CH_R = crate::BitReader;
11#[doc = "Field `DUTY_CHNG_END_CH(0-7)` writer - Interrupt raw bit for channel %s. Triggered when the gradual change of duty has finished."]
12pub type DUTY_CHNG_END_CH_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `OVF_CNT_CH(0-7)` reader - Interrupt raw bit for channel %s. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
14pub type OVF_CNT_CH_R = crate::BitReader;
15#[doc = "Field `OVF_CNT_CH(0-7)` writer - Interrupt raw bit for channel %s. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
16pub type OVF_CNT_CH_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18 #[doc = "Triggered when the timer(0-3) has reached its maximum counter value."]
19 #[doc = ""]
20 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `TIMER0_OVF` field"]
21 #[inline(always)]
22 pub fn timer_ovf(&self, n: u8) -> TIMER_OVF_R {
23 #[allow(clippy::no_effect)]
24 [(); 4][n as usize];
25 TIMER_OVF_R::new(((self.bits >> n) & 1) != 0)
26 }
27 #[doc = "Iterator for array of:"]
28 #[doc = "Triggered when the timer(0-3) has reached its maximum counter value."]
29 #[inline(always)]
30 pub fn timer_ovf_iter(&self) -> impl Iterator<Item = TIMER_OVF_R> + '_ {
31 (0..4).map(move |n| TIMER_OVF_R::new(((self.bits >> n) & 1) != 0))
32 }
33 #[doc = "Bit 0 - Triggered when the timer0 has reached its maximum counter value."]
34 #[inline(always)]
35 pub fn timer0_ovf(&self) -> TIMER_OVF_R {
36 TIMER_OVF_R::new((self.bits & 1) != 0)
37 }
38 #[doc = "Bit 1 - Triggered when the timer1 has reached its maximum counter value."]
39 #[inline(always)]
40 pub fn timer1_ovf(&self) -> TIMER_OVF_R {
41 TIMER_OVF_R::new(((self.bits >> 1) & 1) != 0)
42 }
43 #[doc = "Bit 2 - Triggered when the timer2 has reached its maximum counter value."]
44 #[inline(always)]
45 pub fn timer2_ovf(&self) -> TIMER_OVF_R {
46 TIMER_OVF_R::new(((self.bits >> 2) & 1) != 0)
47 }
48 #[doc = "Bit 3 - Triggered when the timer3 has reached its maximum counter value."]
49 #[inline(always)]
50 pub fn timer3_ovf(&self) -> TIMER_OVF_R {
51 TIMER_OVF_R::new(((self.bits >> 3) & 1) != 0)
52 }
53 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the gradual change of duty has finished."]
54 #[doc = ""]
55 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `DUTY_CHNG_END_CH0` field"]
56 #[inline(always)]
57 pub fn duty_chng_end_ch(&self, n: u8) -> DUTY_CHNG_END_CH_R {
58 #[allow(clippy::no_effect)]
59 [(); 8][n as usize];
60 DUTY_CHNG_END_CH_R::new(((self.bits >> (n + 4)) & 1) != 0)
61 }
62 #[doc = "Iterator for array of:"]
63 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the gradual change of duty has finished."]
64 #[inline(always)]
65 pub fn duty_chng_end_ch_iter(&self) -> impl Iterator<Item = DUTY_CHNG_END_CH_R> + '_ {
66 (0..8).map(move |n| DUTY_CHNG_END_CH_R::new(((self.bits >> (n + 4)) & 1) != 0))
67 }
68 #[doc = "Bit 4 - Interrupt raw bit for channel 0. Triggered when the gradual change of duty has finished."]
69 #[inline(always)]
70 pub fn duty_chng_end_ch0(&self) -> DUTY_CHNG_END_CH_R {
71 DUTY_CHNG_END_CH_R::new(((self.bits >> 4) & 1) != 0)
72 }
73 #[doc = "Bit 5 - Interrupt raw bit for channel 1. Triggered when the gradual change of duty has finished."]
74 #[inline(always)]
75 pub fn duty_chng_end_ch1(&self) -> DUTY_CHNG_END_CH_R {
76 DUTY_CHNG_END_CH_R::new(((self.bits >> 5) & 1) != 0)
77 }
78 #[doc = "Bit 6 - Interrupt raw bit for channel 2. Triggered when the gradual change of duty has finished."]
79 #[inline(always)]
80 pub fn duty_chng_end_ch2(&self) -> DUTY_CHNG_END_CH_R {
81 DUTY_CHNG_END_CH_R::new(((self.bits >> 6) & 1) != 0)
82 }
83 #[doc = "Bit 7 - Interrupt raw bit for channel 3. Triggered when the gradual change of duty has finished."]
84 #[inline(always)]
85 pub fn duty_chng_end_ch3(&self) -> DUTY_CHNG_END_CH_R {
86 DUTY_CHNG_END_CH_R::new(((self.bits >> 7) & 1) != 0)
87 }
88 #[doc = "Bit 8 - Interrupt raw bit for channel 4. Triggered when the gradual change of duty has finished."]
89 #[inline(always)]
90 pub fn duty_chng_end_ch4(&self) -> DUTY_CHNG_END_CH_R {
91 DUTY_CHNG_END_CH_R::new(((self.bits >> 8) & 1) != 0)
92 }
93 #[doc = "Bit 9 - Interrupt raw bit for channel 5. Triggered when the gradual change of duty has finished."]
94 #[inline(always)]
95 pub fn duty_chng_end_ch5(&self) -> DUTY_CHNG_END_CH_R {
96 DUTY_CHNG_END_CH_R::new(((self.bits >> 9) & 1) != 0)
97 }
98 #[doc = "Bit 10 - Interrupt raw bit for channel 6. Triggered when the gradual change of duty has finished."]
99 #[inline(always)]
100 pub fn duty_chng_end_ch6(&self) -> DUTY_CHNG_END_CH_R {
101 DUTY_CHNG_END_CH_R::new(((self.bits >> 10) & 1) != 0)
102 }
103 #[doc = "Bit 11 - Interrupt raw bit for channel 7. Triggered when the gradual change of duty has finished."]
104 #[inline(always)]
105 pub fn duty_chng_end_ch7(&self) -> DUTY_CHNG_END_CH_R {
106 DUTY_CHNG_END_CH_R::new(((self.bits >> 11) & 1) != 0)
107 }
108 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
109 #[doc = ""]
110 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `OVF_CNT_CH0` field"]
111 #[inline(always)]
112 pub fn ovf_cnt_ch(&self, n: u8) -> OVF_CNT_CH_R {
113 #[allow(clippy::no_effect)]
114 [(); 8][n as usize];
115 OVF_CNT_CH_R::new(((self.bits >> (n + 12)) & 1) != 0)
116 }
117 #[doc = "Iterator for array of:"]
118 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
119 #[inline(always)]
120 pub fn ovf_cnt_ch_iter(&self) -> impl Iterator<Item = OVF_CNT_CH_R> + '_ {
121 (0..8).map(move |n| OVF_CNT_CH_R::new(((self.bits >> (n + 12)) & 1) != 0))
122 }
123 #[doc = "Bit 12 - Interrupt raw bit for channel 0. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
124 #[inline(always)]
125 pub fn ovf_cnt_ch0(&self) -> OVF_CNT_CH_R {
126 OVF_CNT_CH_R::new(((self.bits >> 12) & 1) != 0)
127 }
128 #[doc = "Bit 13 - Interrupt raw bit for channel 1. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
129 #[inline(always)]
130 pub fn ovf_cnt_ch1(&self) -> OVF_CNT_CH_R {
131 OVF_CNT_CH_R::new(((self.bits >> 13) & 1) != 0)
132 }
133 #[doc = "Bit 14 - Interrupt raw bit for channel 2. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
134 #[inline(always)]
135 pub fn ovf_cnt_ch2(&self) -> OVF_CNT_CH_R {
136 OVF_CNT_CH_R::new(((self.bits >> 14) & 1) != 0)
137 }
138 #[doc = "Bit 15 - Interrupt raw bit for channel 3. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
139 #[inline(always)]
140 pub fn ovf_cnt_ch3(&self) -> OVF_CNT_CH_R {
141 OVF_CNT_CH_R::new(((self.bits >> 15) & 1) != 0)
142 }
143 #[doc = "Bit 16 - Interrupt raw bit for channel 4. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
144 #[inline(always)]
145 pub fn ovf_cnt_ch4(&self) -> OVF_CNT_CH_R {
146 OVF_CNT_CH_R::new(((self.bits >> 16) & 1) != 0)
147 }
148 #[doc = "Bit 17 - Interrupt raw bit for channel 5. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
149 #[inline(always)]
150 pub fn ovf_cnt_ch5(&self) -> OVF_CNT_CH_R {
151 OVF_CNT_CH_R::new(((self.bits >> 17) & 1) != 0)
152 }
153 #[doc = "Bit 18 - Interrupt raw bit for channel 6. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
154 #[inline(always)]
155 pub fn ovf_cnt_ch6(&self) -> OVF_CNT_CH_R {
156 OVF_CNT_CH_R::new(((self.bits >> 18) & 1) != 0)
157 }
158 #[doc = "Bit 19 - Interrupt raw bit for channel 7. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
159 #[inline(always)]
160 pub fn ovf_cnt_ch7(&self) -> OVF_CNT_CH_R {
161 OVF_CNT_CH_R::new(((self.bits >> 19) & 1) != 0)
162 }
163}
164#[cfg(feature = "impl-register-debug")]
165impl core::fmt::Debug for R {
166 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
167 f.debug_struct("INT_RAW")
168 .field("timer0_ovf", &format_args!("{}", self.timer0_ovf().bit()))
169 .field("timer1_ovf", &format_args!("{}", self.timer1_ovf().bit()))
170 .field("timer2_ovf", &format_args!("{}", self.timer2_ovf().bit()))
171 .field("timer3_ovf", &format_args!("{}", self.timer3_ovf().bit()))
172 .field(
173 "duty_chng_end_ch0",
174 &format_args!("{}", self.duty_chng_end_ch0().bit()),
175 )
176 .field(
177 "duty_chng_end_ch1",
178 &format_args!("{}", self.duty_chng_end_ch1().bit()),
179 )
180 .field(
181 "duty_chng_end_ch2",
182 &format_args!("{}", self.duty_chng_end_ch2().bit()),
183 )
184 .field(
185 "duty_chng_end_ch3",
186 &format_args!("{}", self.duty_chng_end_ch3().bit()),
187 )
188 .field(
189 "duty_chng_end_ch4",
190 &format_args!("{}", self.duty_chng_end_ch4().bit()),
191 )
192 .field(
193 "duty_chng_end_ch5",
194 &format_args!("{}", self.duty_chng_end_ch5().bit()),
195 )
196 .field(
197 "duty_chng_end_ch6",
198 &format_args!("{}", self.duty_chng_end_ch6().bit()),
199 )
200 .field(
201 "duty_chng_end_ch7",
202 &format_args!("{}", self.duty_chng_end_ch7().bit()),
203 )
204 .field("ovf_cnt_ch0", &format_args!("{}", self.ovf_cnt_ch0().bit()))
205 .field("ovf_cnt_ch1", &format_args!("{}", self.ovf_cnt_ch1().bit()))
206 .field("ovf_cnt_ch2", &format_args!("{}", self.ovf_cnt_ch2().bit()))
207 .field("ovf_cnt_ch3", &format_args!("{}", self.ovf_cnt_ch3().bit()))
208 .field("ovf_cnt_ch4", &format_args!("{}", self.ovf_cnt_ch4().bit()))
209 .field("ovf_cnt_ch5", &format_args!("{}", self.ovf_cnt_ch5().bit()))
210 .field("ovf_cnt_ch6", &format_args!("{}", self.ovf_cnt_ch6().bit()))
211 .field("ovf_cnt_ch7", &format_args!("{}", self.ovf_cnt_ch7().bit()))
212 .finish()
213 }
214}
215#[cfg(feature = "impl-register-debug")]
216impl core::fmt::Debug for crate::generic::Reg<INT_RAW_SPEC> {
217 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
218 core::fmt::Debug::fmt(&self.read(), f)
219 }
220}
221impl W {
222 #[doc = "Triggered when the timer(0-3) has reached its maximum counter value."]
223 #[doc = ""]
224 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `TIMER0_OVF` field"]
225 #[inline(always)]
226 #[must_use]
227 pub fn timer_ovf(&mut self, n: u8) -> TIMER_OVF_W<INT_RAW_SPEC> {
228 #[allow(clippy::no_effect)]
229 [(); 4][n as usize];
230 TIMER_OVF_W::new(self, n)
231 }
232 #[doc = "Bit 0 - Triggered when the timer0 has reached its maximum counter value."]
233 #[inline(always)]
234 #[must_use]
235 pub fn timer0_ovf(&mut self) -> TIMER_OVF_W<INT_RAW_SPEC> {
236 TIMER_OVF_W::new(self, 0)
237 }
238 #[doc = "Bit 1 - Triggered when the timer1 has reached its maximum counter value."]
239 #[inline(always)]
240 #[must_use]
241 pub fn timer1_ovf(&mut self) -> TIMER_OVF_W<INT_RAW_SPEC> {
242 TIMER_OVF_W::new(self, 1)
243 }
244 #[doc = "Bit 2 - Triggered when the timer2 has reached its maximum counter value."]
245 #[inline(always)]
246 #[must_use]
247 pub fn timer2_ovf(&mut self) -> TIMER_OVF_W<INT_RAW_SPEC> {
248 TIMER_OVF_W::new(self, 2)
249 }
250 #[doc = "Bit 3 - Triggered when the timer3 has reached its maximum counter value."]
251 #[inline(always)]
252 #[must_use]
253 pub fn timer3_ovf(&mut self) -> TIMER_OVF_W<INT_RAW_SPEC> {
254 TIMER_OVF_W::new(self, 3)
255 }
256 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the gradual change of duty has finished."]
257 #[doc = ""]
258 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `DUTY_CHNG_END_CH0` field"]
259 #[inline(always)]
260 #[must_use]
261 pub fn duty_chng_end_ch(&mut self, n: u8) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
262 #[allow(clippy::no_effect)]
263 [(); 8][n as usize];
264 DUTY_CHNG_END_CH_W::new(self, n + 4)
265 }
266 #[doc = "Bit 4 - Interrupt raw bit for channel 0. Triggered when the gradual change of duty has finished."]
267 #[inline(always)]
268 #[must_use]
269 pub fn duty_chng_end_ch0(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
270 DUTY_CHNG_END_CH_W::new(self, 4)
271 }
272 #[doc = "Bit 5 - Interrupt raw bit for channel 1. Triggered when the gradual change of duty has finished."]
273 #[inline(always)]
274 #[must_use]
275 pub fn duty_chng_end_ch1(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
276 DUTY_CHNG_END_CH_W::new(self, 5)
277 }
278 #[doc = "Bit 6 - Interrupt raw bit for channel 2. Triggered when the gradual change of duty has finished."]
279 #[inline(always)]
280 #[must_use]
281 pub fn duty_chng_end_ch2(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
282 DUTY_CHNG_END_CH_W::new(self, 6)
283 }
284 #[doc = "Bit 7 - Interrupt raw bit for channel 3. Triggered when the gradual change of duty has finished."]
285 #[inline(always)]
286 #[must_use]
287 pub fn duty_chng_end_ch3(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
288 DUTY_CHNG_END_CH_W::new(self, 7)
289 }
290 #[doc = "Bit 8 - Interrupt raw bit for channel 4. Triggered when the gradual change of duty has finished."]
291 #[inline(always)]
292 #[must_use]
293 pub fn duty_chng_end_ch4(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
294 DUTY_CHNG_END_CH_W::new(self, 8)
295 }
296 #[doc = "Bit 9 - Interrupt raw bit for channel 5. Triggered when the gradual change of duty has finished."]
297 #[inline(always)]
298 #[must_use]
299 pub fn duty_chng_end_ch5(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
300 DUTY_CHNG_END_CH_W::new(self, 9)
301 }
302 #[doc = "Bit 10 - Interrupt raw bit for channel 6. Triggered when the gradual change of duty has finished."]
303 #[inline(always)]
304 #[must_use]
305 pub fn duty_chng_end_ch6(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
306 DUTY_CHNG_END_CH_W::new(self, 10)
307 }
308 #[doc = "Bit 11 - Interrupt raw bit for channel 7. Triggered when the gradual change of duty has finished."]
309 #[inline(always)]
310 #[must_use]
311 pub fn duty_chng_end_ch7(&mut self) -> DUTY_CHNG_END_CH_W<INT_RAW_SPEC> {
312 DUTY_CHNG_END_CH_W::new(self, 11)
313 }
314 #[doc = "Interrupt raw bit for channel (0-7). Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
315 #[doc = ""]
316 #[doc = "NOTE: `n` is number of field in register. `n == 0` corresponds to `OVF_CNT_CH0` field"]
317 #[inline(always)]
318 #[must_use]
319 pub fn ovf_cnt_ch(&mut self, n: u8) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
320 #[allow(clippy::no_effect)]
321 [(); 8][n as usize];
322 OVF_CNT_CH_W::new(self, n + 12)
323 }
324 #[doc = "Bit 12 - Interrupt raw bit for channel 0. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
325 #[inline(always)]
326 #[must_use]
327 pub fn ovf_cnt_ch0(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
328 OVF_CNT_CH_W::new(self, 12)
329 }
330 #[doc = "Bit 13 - Interrupt raw bit for channel 1. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
331 #[inline(always)]
332 #[must_use]
333 pub fn ovf_cnt_ch1(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
334 OVF_CNT_CH_W::new(self, 13)
335 }
336 #[doc = "Bit 14 - Interrupt raw bit for channel 2. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
337 #[inline(always)]
338 #[must_use]
339 pub fn ovf_cnt_ch2(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
340 OVF_CNT_CH_W::new(self, 14)
341 }
342 #[doc = "Bit 15 - Interrupt raw bit for channel 3. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
343 #[inline(always)]
344 #[must_use]
345 pub fn ovf_cnt_ch3(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
346 OVF_CNT_CH_W::new(self, 15)
347 }
348 #[doc = "Bit 16 - Interrupt raw bit for channel 4. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
349 #[inline(always)]
350 #[must_use]
351 pub fn ovf_cnt_ch4(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
352 OVF_CNT_CH_W::new(self, 16)
353 }
354 #[doc = "Bit 17 - Interrupt raw bit for channel 5. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
355 #[inline(always)]
356 #[must_use]
357 pub fn ovf_cnt_ch5(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
358 OVF_CNT_CH_W::new(self, 17)
359 }
360 #[doc = "Bit 18 - Interrupt raw bit for channel 6. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
361 #[inline(always)]
362 #[must_use]
363 pub fn ovf_cnt_ch6(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
364 OVF_CNT_CH_W::new(self, 18)
365 }
366 #[doc = "Bit 19 - Interrupt raw bit for channel 7. Triggered when the OVF_CNT has reached the value specified by LEDC.CHx.CONF0.OVF_NUM."]
367 #[inline(always)]
368 #[must_use]
369 pub fn ovf_cnt_ch7(&mut self) -> OVF_CNT_CH_W<INT_RAW_SPEC> {
370 OVF_CNT_CH_W::new(self, 19)
371 }
372}
373#[doc = "Interrupt raw status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_raw::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`int_raw::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
374pub struct INT_RAW_SPEC;
375impl crate::RegisterSpec for INT_RAW_SPEC {
376 type Ux = u32;
377}
378#[doc = "`read()` method returns [`int_raw::R`](R) reader structure"]
379impl crate::Readable for INT_RAW_SPEC {}
380#[doc = "`write(|w| ..)` method takes [`int_raw::W`](W) writer structure"]
381impl crate::Writable for INT_RAW_SPEC {
382 type Safety = crate::Unsafe;
383 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
384 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
385}
386#[doc = "`reset()` method sets INT_RAW to value 0"]
387impl crate::Resettable for INT_RAW_SPEC {
388 const RESET_VALUE: u32 = 0;
389}