1#[doc = "Register `GPIO%s` reader"]
2pub type R = crate::R<GPIO_SPEC>;
3#[doc = "Register `GPIO%s` writer"]
4pub type W = crate::W<GPIO_SPEC>;
5#[doc = "Field `MCU_OE` reader - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"]
6pub type MCU_OE_R = crate::BitReader;
7#[doc = "Field `MCU_OE` writer - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"]
8pub type MCU_OE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `SLP_SEL` reader - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"]
10pub type SLP_SEL_R = crate::BitReader;
11#[doc = "Field `SLP_SEL` writer - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"]
12pub type SLP_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `MCU_WPD` reader - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
14pub type MCU_WPD_R = crate::BitReader;
15#[doc = "Field `MCU_WPD` writer - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
16pub type MCU_WPD_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `MCU_WPU` reader - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
18pub type MCU_WPU_R = crate::BitReader;
19#[doc = "Field `MCU_WPU` writer - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
20pub type MCU_WPU_W<'a, REG> = crate::BitWriter<'a, REG>;
21#[doc = "Field `MCU_IE` reader - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"]
22pub type MCU_IE_R = crate::BitReader;
23#[doc = "Field `MCU_IE` writer - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"]
24pub type MCU_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `MCU_DRV` reader - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
26pub type MCU_DRV_R = crate::FieldReader;
27#[doc = "Field `MCU_DRV` writer - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
28pub type MCU_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
29#[doc = "Field `FUN_WPD` reader - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"]
30pub type FUN_WPD_R = crate::BitReader;
31#[doc = "Field `FUN_WPD` writer - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"]
32pub type FUN_WPD_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `FUN_WPU` reader - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"]
34pub type FUN_WPU_R = crate::BitReader;
35#[doc = "Field `FUN_WPU` writer - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"]
36pub type FUN_WPU_W<'a, REG> = crate::BitWriter<'a, REG>;
37#[doc = "Field `FUN_IE` reader - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"]
38pub type FUN_IE_R = crate::BitReader;
39#[doc = "Field `FUN_IE` writer - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"]
40pub type FUN_IE_W<'a, REG> = crate::BitWriter<'a, REG>;
41#[doc = "Field `FUN_DRV` reader - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
42pub type FUN_DRV_R = crate::FieldReader;
43#[doc = "Field `FUN_DRV` writer - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
44pub type FUN_DRV_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
45#[doc = "Field `MCU_SEL` reader - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"]
46pub type MCU_SEL_R = crate::FieldReader;
47#[doc = "Field `MCU_SEL` writer - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"]
48pub type MCU_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
49#[doc = "Field `FILTER_EN` reader - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"]
50pub type FILTER_EN_R = crate::BitReader;
51#[doc = "Field `FILTER_EN` writer - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"]
52pub type FILTER_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
53impl R {
54 #[doc = "Bit 0 - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"]
55 #[inline(always)]
56 pub fn mcu_oe(&self) -> MCU_OE_R {
57 MCU_OE_R::new((self.bits & 1) != 0)
58 }
59 #[doc = "Bit 1 - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"]
60 #[inline(always)]
61 pub fn slp_sel(&self) -> SLP_SEL_R {
62 SLP_SEL_R::new(((self.bits >> 1) & 1) != 0)
63 }
64 #[doc = "Bit 2 - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
65 #[inline(always)]
66 pub fn mcu_wpd(&self) -> MCU_WPD_R {
67 MCU_WPD_R::new(((self.bits >> 2) & 1) != 0)
68 }
69 #[doc = "Bit 3 - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
70 #[inline(always)]
71 pub fn mcu_wpu(&self) -> MCU_WPU_R {
72 MCU_WPU_R::new(((self.bits >> 3) & 1) != 0)
73 }
74 #[doc = "Bit 4 - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"]
75 #[inline(always)]
76 pub fn mcu_ie(&self) -> MCU_IE_R {
77 MCU_IE_R::new(((self.bits >> 4) & 1) != 0)
78 }
79 #[doc = "Bits 5:6 - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
80 #[inline(always)]
81 pub fn mcu_drv(&self) -> MCU_DRV_R {
82 MCU_DRV_R::new(((self.bits >> 5) & 3) as u8)
83 }
84 #[doc = "Bit 7 - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"]
85 #[inline(always)]
86 pub fn fun_wpd(&self) -> FUN_WPD_R {
87 FUN_WPD_R::new(((self.bits >> 7) & 1) != 0)
88 }
89 #[doc = "Bit 8 - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"]
90 #[inline(always)]
91 pub fn fun_wpu(&self) -> FUN_WPU_R {
92 FUN_WPU_R::new(((self.bits >> 8) & 1) != 0)
93 }
94 #[doc = "Bit 9 - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"]
95 #[inline(always)]
96 pub fn fun_ie(&self) -> FUN_IE_R {
97 FUN_IE_R::new(((self.bits >> 9) & 1) != 0)
98 }
99 #[doc = "Bits 10:11 - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
100 #[inline(always)]
101 pub fn fun_drv(&self) -> FUN_DRV_R {
102 FUN_DRV_R::new(((self.bits >> 10) & 3) as u8)
103 }
104 #[doc = "Bits 12:14 - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"]
105 #[inline(always)]
106 pub fn mcu_sel(&self) -> MCU_SEL_R {
107 MCU_SEL_R::new(((self.bits >> 12) & 7) as u8)
108 }
109 #[doc = "Bit 15 - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"]
110 #[inline(always)]
111 pub fn filter_en(&self) -> FILTER_EN_R {
112 FILTER_EN_R::new(((self.bits >> 15) & 1) != 0)
113 }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for R {
117 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
118 f.debug_struct("GPIO")
119 .field("mcu_oe", &format_args!("{}", self.mcu_oe().bit()))
120 .field("slp_sel", &format_args!("{}", self.slp_sel().bit()))
121 .field("mcu_wpd", &format_args!("{}", self.mcu_wpd().bit()))
122 .field("mcu_wpu", &format_args!("{}", self.mcu_wpu().bit()))
123 .field("mcu_ie", &format_args!("{}", self.mcu_ie().bit()))
124 .field("mcu_drv", &format_args!("{}", self.mcu_drv().bits()))
125 .field("fun_wpd", &format_args!("{}", self.fun_wpd().bit()))
126 .field("fun_wpu", &format_args!("{}", self.fun_wpu().bit()))
127 .field("fun_ie", &format_args!("{}", self.fun_ie().bit()))
128 .field("fun_drv", &format_args!("{}", self.fun_drv().bits()))
129 .field("mcu_sel", &format_args!("{}", self.mcu_sel().bits()))
130 .field("filter_en", &format_args!("{}", self.filter_en().bit()))
131 .finish()
132 }
133}
134#[cfg(feature = "impl-register-debug")]
135impl core::fmt::Debug for crate::generic::Reg<GPIO_SPEC> {
136 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
137 core::fmt::Debug::fmt(&self.read(), f)
138 }
139}
140impl W {
141 #[doc = "Bit 0 - Configures whether or not to enable the output of GPIOn in sleep mode. 0: Disable 1: Enable"]
142 #[inline(always)]
143 #[must_use]
144 pub fn mcu_oe(&mut self) -> MCU_OE_W<GPIO_SPEC> {
145 MCU_OE_W::new(self, 0)
146 }
147 #[doc = "Bit 1 - Configures whether or not to enter sleep mode for GPIOn. 0: Not enter 1: Enter"]
148 #[inline(always)]
149 #[must_use]
150 pub fn slp_sel(&mut self) -> SLP_SEL_W<GPIO_SPEC> {
151 SLP_SEL_W::new(self, 1)
152 }
153 #[doc = "Bit 2 - Configure whether or not to enable pull-down resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
154 #[inline(always)]
155 #[must_use]
156 pub fn mcu_wpd(&mut self) -> MCU_WPD_W<GPIO_SPEC> {
157 MCU_WPD_W::new(self, 2)
158 }
159 #[doc = "Bit 3 - Configures whether or not to enable pull-up resistor of GPIOn during sleep mode. 0: Disable 1: Enable"]
160 #[inline(always)]
161 #[must_use]
162 pub fn mcu_wpu(&mut self) -> MCU_WPU_W<GPIO_SPEC> {
163 MCU_WPU_W::new(self, 3)
164 }
165 #[doc = "Bit 4 - Configures whether or not to enable the input of GPIOn during sleep mode. 0: Disable 1: Enable"]
166 #[inline(always)]
167 #[must_use]
168 pub fn mcu_ie(&mut self) -> MCU_IE_W<GPIO_SPEC> {
169 MCU_IE_W::new(self, 4)
170 }
171 #[doc = "Bits 5:6 - Configures the drive strength of GPIOn during sleep mode. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
172 #[inline(always)]
173 #[must_use]
174 pub fn mcu_drv(&mut self) -> MCU_DRV_W<GPIO_SPEC> {
175 MCU_DRV_W::new(self, 5)
176 }
177 #[doc = "Bit 7 - Configures whether or not to enable pull-down resistor of GPIOn. 0: Disable 1: Enable"]
178 #[inline(always)]
179 #[must_use]
180 pub fn fun_wpd(&mut self) -> FUN_WPD_W<GPIO_SPEC> {
181 FUN_WPD_W::new(self, 7)
182 }
183 #[doc = "Bit 8 - Configures whether or not enable pull-up resistor of GPIOn. 0: Disable 1: Enable"]
184 #[inline(always)]
185 #[must_use]
186 pub fn fun_wpu(&mut self) -> FUN_WPU_W<GPIO_SPEC> {
187 FUN_WPU_W::new(self, 8)
188 }
189 #[doc = "Bit 9 - Configures whether or not to enable input of GPIOn. 0: Disable 1: Enable"]
190 #[inline(always)]
191 #[must_use]
192 pub fn fun_ie(&mut self) -> FUN_IE_W<GPIO_SPEC> {
193 FUN_IE_W::new(self, 9)
194 }
195 #[doc = "Bits 10:11 - Configures the drive strength of GPIOn. 0: ~5 mA 1: ~10 mA 2: ~20 mA 3: ~40 mA"]
196 #[inline(always)]
197 #[must_use]
198 pub fn fun_drv(&mut self) -> FUN_DRV_W<GPIO_SPEC> {
199 FUN_DRV_W::new(self, 10)
200 }
201 #[doc = "Bits 12:14 - Configures to select IO MUX function for this pin. 0: Select Function 0 1: Select Function 1 ......"]
202 #[inline(always)]
203 #[must_use]
204 pub fn mcu_sel(&mut self) -> MCU_SEL_W<GPIO_SPEC> {
205 MCU_SEL_W::new(self, 12)
206 }
207 #[doc = "Bit 15 - Configures whether or not to enable filter for pin input signals. 0: Disable 1: Enable"]
208 #[inline(always)]
209 #[must_use]
210 pub fn filter_en(&mut self) -> FILTER_EN_W<GPIO_SPEC> {
211 FILTER_EN_W::new(self, 15)
212 }
213}
214#[doc = "IO_MUX Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`gpio::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`gpio::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
215pub struct GPIO_SPEC;
216impl crate::RegisterSpec for GPIO_SPEC {
217 type Ux = u32;
218}
219#[doc = "`read()` method returns [`gpio::R`](R) reader structure"]
220impl crate::Readable for GPIO_SPEC {}
221#[doc = "`write(|w| ..)` method takes [`gpio::W`](W) writer structure"]
222impl crate::Writable for GPIO_SPEC {
223 type Safety = crate::Unsafe;
224 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
225 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
226}
227#[doc = "`reset()` method sets GPIO%s to value 0"]
228impl crate::Resettable for GPIO_SPEC {
229 const RESET_VALUE: u32 = 0;
230}