esp32p4/i3c_mst/
scl_start_hold.rs

1#[doc = "Register `SCL_START_HOLD` reader"]
2pub type R = crate::R<SCL_START_HOLD_SPEC>;
3#[doc = "Register `SCL_START_HOLD` writer"]
4pub type W = crate::W<SCL_START_HOLD_SPEC>;
5#[doc = "Field `REG_SCL_START_HOLD_TIME` reader - I2C_SCL_START_HOLD_TIME"]
6pub type REG_SCL_START_HOLD_TIME_R = crate::FieldReader<u16>;
7#[doc = "Field `REG_SCL_START_HOLD_TIME` writer - I2C_SCL_START_HOLD_TIME"]
8pub type REG_SCL_START_HOLD_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 9, u16>;
9#[doc = "Field `REG_START_DET_HOLD_TIME` reader - NA"]
10pub type REG_START_DET_HOLD_TIME_R = crate::FieldReader;
11#[doc = "Field `REG_START_DET_HOLD_TIME` writer - NA"]
12pub type REG_START_DET_HOLD_TIME_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13impl R {
14    #[doc = "Bits 0:8 - I2C_SCL_START_HOLD_TIME"]
15    #[inline(always)]
16    pub fn reg_scl_start_hold_time(&self) -> REG_SCL_START_HOLD_TIME_R {
17        REG_SCL_START_HOLD_TIME_R::new((self.bits & 0x01ff) as u16)
18    }
19    #[doc = "Bits 9:10 - NA"]
20    #[inline(always)]
21    pub fn reg_start_det_hold_time(&self) -> REG_START_DET_HOLD_TIME_R {
22        REG_START_DET_HOLD_TIME_R::new(((self.bits >> 9) & 3) as u8)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("SCL_START_HOLD")
29            .field(
30                "reg_scl_start_hold_time",
31                &format_args!("{}", self.reg_scl_start_hold_time().bits()),
32            )
33            .field(
34                "reg_start_det_hold_time",
35                &format_args!("{}", self.reg_start_det_hold_time().bits()),
36            )
37            .finish()
38    }
39}
40#[cfg(feature = "impl-register-debug")]
41impl core::fmt::Debug for crate::generic::Reg<SCL_START_HOLD_SPEC> {
42    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
43        core::fmt::Debug::fmt(&self.read(), f)
44    }
45}
46impl W {
47    #[doc = "Bits 0:8 - I2C_SCL_START_HOLD_TIME"]
48    #[inline(always)]
49    #[must_use]
50    pub fn reg_scl_start_hold_time(&mut self) -> REG_SCL_START_HOLD_TIME_W<SCL_START_HOLD_SPEC> {
51        REG_SCL_START_HOLD_TIME_W::new(self, 0)
52    }
53    #[doc = "Bits 9:10 - NA"]
54    #[inline(always)]
55    #[must_use]
56    pub fn reg_start_det_hold_time(&mut self) -> REG_START_DET_HOLD_TIME_W<SCL_START_HOLD_SPEC> {
57        REG_START_DET_HOLD_TIME_W::new(self, 9)
58    }
59}
60#[doc = "NA\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`scl_start_hold::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`scl_start_hold::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct SCL_START_HOLD_SPEC;
62impl crate::RegisterSpec for SCL_START_HOLD_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`scl_start_hold::R`](R) reader structure"]
66impl crate::Readable for SCL_START_HOLD_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`scl_start_hold::W`](W) writer structure"]
68impl crate::Writable for SCL_START_HOLD_SPEC {
69    type Safety = crate::Unsafe;
70    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
71    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
72}
73#[doc = "`reset()` method sets SCL_START_HOLD to value 0x08"]
74impl crate::Resettable for SCL_START_HOLD_SPEC {
75    const RESET_VALUE: u32 = 0x08;
76}
esp32p4/i3c_mst/scl_start_hold.rs

esp32p4/i3c_mst/
scl_start_hold.rs
