1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `RXFIFO_WM` reader - The masked interrupt status status of I2C_RXFIFO_WM_INT interrupt."]
4pub type RXFIFO_WM_R = crate::BitReader;
5#[doc = "Field `TXFIFO_WM` reader - The masked interrupt status status of I2C_TXFIFO_WM_INT interrupt."]
6pub type TXFIFO_WM_R = crate::BitReader;
7#[doc = "Field `RXFIFO_OVF` reader - The masked interrupt status status of I2C_RXFIFO_OVF_INT interrupt."]
8pub type RXFIFO_OVF_R = crate::BitReader;
9#[doc = "Field `END_DETECT` reader - The masked interrupt status status of the I2C_END_DETECT_INT interrupt."]
10pub type END_DETECT_R = crate::BitReader;
11#[doc = "Field `BYTE_TRANS_DONE` reader - The masked interrupt status status of the I2C_END_DETECT_INT interrupt."]
12pub type BYTE_TRANS_DONE_R = crate::BitReader;
13#[doc = "Field `ARBITRATION_LOST` reader - The masked interrupt status status of the I2C_ARBITRATION_LOST_INT interrupt."]
14pub type ARBITRATION_LOST_R = crate::BitReader;
15#[doc = "Field `MST_TXFIFO_UDF` reader - The masked interrupt status status of I2C_TRANS_COMPLETE_INT interrupt."]
16pub type MST_TXFIFO_UDF_R = crate::BitReader;
17#[doc = "Field `TRANS_COMPLETE` reader - The masked interrupt status status of the I2C_TRANS_COMPLETE_INT interrupt."]
18pub type TRANS_COMPLETE_R = crate::BitReader;
19#[doc = "Field `TIME_OUT` reader - The masked interrupt status status of the I2C_TIME_OUT_INT interrupt."]
20pub type TIME_OUT_R = crate::BitReader;
21#[doc = "Field `TRANS_START` reader - The masked interrupt status status of the I2C_TRANS_START_INT interrupt."]
22pub type TRANS_START_R = crate::BitReader;
23#[doc = "Field `NACK` reader - The masked interrupt status status of I2C_SLAVE_STRETCH_INT interrupt."]
24pub type NACK_R = crate::BitReader;
25#[doc = "Field `TXFIFO_OVF` reader - The masked interrupt status status of I2C_TXFIFO_OVF_INT interrupt."]
26pub type TXFIFO_OVF_R = crate::BitReader;
27#[doc = "Field `RXFIFO_UDF` reader - The masked interrupt status status of I2C_RXFIFO_UDF_INT interrupt."]
28pub type RXFIFO_UDF_R = crate::BitReader;
29#[doc = "Field `SCL_ST_TO` reader - The masked interrupt status status of I2C_SCL_ST_TO_INT interrupt."]
30pub type SCL_ST_TO_R = crate::BitReader;
31#[doc = "Field `SCL_MAIN_ST_TO` reader - The masked interrupt status status of I2C_SCL_MAIN_ST_TO_INT interrupt."]
32pub type SCL_MAIN_ST_TO_R = crate::BitReader;
33#[doc = "Field `DET_START` reader - The masked interrupt status status of I2C_DET_START_INT interrupt."]
34pub type DET_START_R = crate::BitReader;
35#[doc = "Field `SLAVE_STRETCH` reader - The masked interrupt status status of I2C_SLAVE_STRETCH_INT interrupt."]
36pub type SLAVE_STRETCH_R = crate::BitReader;
37#[doc = "Field `GENERAL_CALL` reader - The masked interrupt status status of I2C_GENARAL_CALL_INT interrupt."]
38pub type GENERAL_CALL_R = crate::BitReader;
39#[doc = "Field `SLAVE_ADDR_UNMATCH` reader - The masked interrupt status status of I2C_SLAVE_ADDR_UNMATCH_INT interrupt."]
40pub type SLAVE_ADDR_UNMATCH_R = crate::BitReader;
41impl R {
42 #[doc = "Bit 0 - The masked interrupt status status of I2C_RXFIFO_WM_INT interrupt."]
43 #[inline(always)]
44 pub fn rxfifo_wm(&self) -> RXFIFO_WM_R {
45 RXFIFO_WM_R::new((self.bits & 1) != 0)
46 }
47 #[doc = "Bit 1 - The masked interrupt status status of I2C_TXFIFO_WM_INT interrupt."]
48 #[inline(always)]
49 pub fn txfifo_wm(&self) -> TXFIFO_WM_R {
50 TXFIFO_WM_R::new(((self.bits >> 1) & 1) != 0)
51 }
52 #[doc = "Bit 2 - The masked interrupt status status of I2C_RXFIFO_OVF_INT interrupt."]
53 #[inline(always)]
54 pub fn rxfifo_ovf(&self) -> RXFIFO_OVF_R {
55 RXFIFO_OVF_R::new(((self.bits >> 2) & 1) != 0)
56 }
57 #[doc = "Bit 3 - The masked interrupt status status of the I2C_END_DETECT_INT interrupt."]
58 #[inline(always)]
59 pub fn end_detect(&self) -> END_DETECT_R {
60 END_DETECT_R::new(((self.bits >> 3) & 1) != 0)
61 }
62 #[doc = "Bit 4 - The masked interrupt status status of the I2C_END_DETECT_INT interrupt."]
63 #[inline(always)]
64 pub fn byte_trans_done(&self) -> BYTE_TRANS_DONE_R {
65 BYTE_TRANS_DONE_R::new(((self.bits >> 4) & 1) != 0)
66 }
67 #[doc = "Bit 5 - The masked interrupt status status of the I2C_ARBITRATION_LOST_INT interrupt."]
68 #[inline(always)]
69 pub fn arbitration_lost(&self) -> ARBITRATION_LOST_R {
70 ARBITRATION_LOST_R::new(((self.bits >> 5) & 1) != 0)
71 }
72 #[doc = "Bit 6 - The masked interrupt status status of I2C_TRANS_COMPLETE_INT interrupt."]
73 #[inline(always)]
74 pub fn mst_txfifo_udf(&self) -> MST_TXFIFO_UDF_R {
75 MST_TXFIFO_UDF_R::new(((self.bits >> 6) & 1) != 0)
76 }
77 #[doc = "Bit 7 - The masked interrupt status status of the I2C_TRANS_COMPLETE_INT interrupt."]
78 #[inline(always)]
79 pub fn trans_complete(&self) -> TRANS_COMPLETE_R {
80 TRANS_COMPLETE_R::new(((self.bits >> 7) & 1) != 0)
81 }
82 #[doc = "Bit 8 - The masked interrupt status status of the I2C_TIME_OUT_INT interrupt."]
83 #[inline(always)]
84 pub fn time_out(&self) -> TIME_OUT_R {
85 TIME_OUT_R::new(((self.bits >> 8) & 1) != 0)
86 }
87 #[doc = "Bit 9 - The masked interrupt status status of the I2C_TRANS_START_INT interrupt."]
88 #[inline(always)]
89 pub fn trans_start(&self) -> TRANS_START_R {
90 TRANS_START_R::new(((self.bits >> 9) & 1) != 0)
91 }
92 #[doc = "Bit 10 - The masked interrupt status status of I2C_SLAVE_STRETCH_INT interrupt."]
93 #[inline(always)]
94 pub fn nack(&self) -> NACK_R {
95 NACK_R::new(((self.bits >> 10) & 1) != 0)
96 }
97 #[doc = "Bit 11 - The masked interrupt status status of I2C_TXFIFO_OVF_INT interrupt."]
98 #[inline(always)]
99 pub fn txfifo_ovf(&self) -> TXFIFO_OVF_R {
100 TXFIFO_OVF_R::new(((self.bits >> 11) & 1) != 0)
101 }
102 #[doc = "Bit 12 - The masked interrupt status status of I2C_RXFIFO_UDF_INT interrupt."]
103 #[inline(always)]
104 pub fn rxfifo_udf(&self) -> RXFIFO_UDF_R {
105 RXFIFO_UDF_R::new(((self.bits >> 12) & 1) != 0)
106 }
107 #[doc = "Bit 13 - The masked interrupt status status of I2C_SCL_ST_TO_INT interrupt."]
108 #[inline(always)]
109 pub fn scl_st_to(&self) -> SCL_ST_TO_R {
110 SCL_ST_TO_R::new(((self.bits >> 13) & 1) != 0)
111 }
112 #[doc = "Bit 14 - The masked interrupt status status of I2C_SCL_MAIN_ST_TO_INT interrupt."]
113 #[inline(always)]
114 pub fn scl_main_st_to(&self) -> SCL_MAIN_ST_TO_R {
115 SCL_MAIN_ST_TO_R::new(((self.bits >> 14) & 1) != 0)
116 }
117 #[doc = "Bit 15 - The masked interrupt status status of I2C_DET_START_INT interrupt."]
118 #[inline(always)]
119 pub fn det_start(&self) -> DET_START_R {
120 DET_START_R::new(((self.bits >> 15) & 1) != 0)
121 }
122 #[doc = "Bit 16 - The masked interrupt status status of I2C_SLAVE_STRETCH_INT interrupt."]
123 #[inline(always)]
124 pub fn slave_stretch(&self) -> SLAVE_STRETCH_R {
125 SLAVE_STRETCH_R::new(((self.bits >> 16) & 1) != 0)
126 }
127 #[doc = "Bit 17 - The masked interrupt status status of I2C_GENARAL_CALL_INT interrupt."]
128 #[inline(always)]
129 pub fn general_call(&self) -> GENERAL_CALL_R {
130 GENERAL_CALL_R::new(((self.bits >> 17) & 1) != 0)
131 }
132 #[doc = "Bit 18 - The masked interrupt status status of I2C_SLAVE_ADDR_UNMATCH_INT interrupt."]
133 #[inline(always)]
134 pub fn slave_addr_unmatch(&self) -> SLAVE_ADDR_UNMATCH_R {
135 SLAVE_ADDR_UNMATCH_R::new(((self.bits >> 18) & 1) != 0)
136 }
137}
138#[cfg(feature = "impl-register-debug")]
139impl core::fmt::Debug for R {
140 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
141 f.debug_struct("INT_ST")
142 .field("rxfifo_wm", &format_args!("{}", self.rxfifo_wm().bit()))
143 .field("txfifo_wm", &format_args!("{}", self.txfifo_wm().bit()))
144 .field("rxfifo_ovf", &format_args!("{}", self.rxfifo_ovf().bit()))
145 .field("end_detect", &format_args!("{}", self.end_detect().bit()))
146 .field(
147 "byte_trans_done",
148 &format_args!("{}", self.byte_trans_done().bit()),
149 )
150 .field(
151 "arbitration_lost",
152 &format_args!("{}", self.arbitration_lost().bit()),
153 )
154 .field(
155 "mst_txfifo_udf",
156 &format_args!("{}", self.mst_txfifo_udf().bit()),
157 )
158 .field(
159 "trans_complete",
160 &format_args!("{}", self.trans_complete().bit()),
161 )
162 .field("time_out", &format_args!("{}", self.time_out().bit()))
163 .field("trans_start", &format_args!("{}", self.trans_start().bit()))
164 .field("nack", &format_args!("{}", self.nack().bit()))
165 .field("txfifo_ovf", &format_args!("{}", self.txfifo_ovf().bit()))
166 .field("rxfifo_udf", &format_args!("{}", self.rxfifo_udf().bit()))
167 .field("scl_st_to", &format_args!("{}", self.scl_st_to().bit()))
168 .field(
169 "scl_main_st_to",
170 &format_args!("{}", self.scl_main_st_to().bit()),
171 )
172 .field("det_start", &format_args!("{}", self.det_start().bit()))
173 .field(
174 "slave_stretch",
175 &format_args!("{}", self.slave_stretch().bit()),
176 )
177 .field(
178 "general_call",
179 &format_args!("{}", self.general_call().bit()),
180 )
181 .field(
182 "slave_addr_unmatch",
183 &format_args!("{}", self.slave_addr_unmatch().bit()),
184 )
185 .finish()
186 }
187}
188#[cfg(feature = "impl-register-debug")]
189impl core::fmt::Debug for crate::generic::Reg<INT_ST_SPEC> {
190 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
191 core::fmt::Debug::fmt(&self.read(), f)
192 }
193}
194#[doc = "Status of captured I2C communication events\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
195pub struct INT_ST_SPEC;
196impl crate::RegisterSpec for INT_ST_SPEC {
197 type Ux = u32;
198}
199#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
200impl crate::Readable for INT_ST_SPEC {}
201#[doc = "`reset()` method sets INT_ST to value 0"]
202impl crate::Resettable for INT_ST_SPEC {
203 const RESET_VALUE: u32 = 0;
204}