1#[doc = "Register `INT_ST` reader"]
2pub type R = crate::R<INT_ST_SPEC>;
3#[doc = "Field `DB_TMP_READY` reader - The masked interrupt status of H264_DB_TMP_READY_INT. Valid only when the H264_DB_TMP_READY_INT_ENA is set to 1."]
4pub type DB_TMP_READY_R = crate::BitReader;
5#[doc = "Field `REC_READY` reader - The masked interrupt status of H264_REC_READY_INT. Valid only when the H264_REC_READY_INT_ENA is set to 1."]
6pub type REC_READY_R = crate::BitReader;
7#[doc = "Field `FRAME_DONE` reader - The masked interrupt status of H264_FRAME_DONE_INT. Valid only when the H264_FRAME_DONE_INT_ENA is set to 1."]
8pub type FRAME_DONE_R = crate::BitReader;
9#[doc = "Field `DMA_MOVE_2MB_LINE_DONE` reader - Masked status bit: The masked interrupt status of H264_DMA_MOVE_2MB_LINE_DONE_INT. Valid only when the H264_DMA_MOVE_2MB_LINE_DONE_INT_ENA is set to 1."]
10pub type DMA_MOVE_2MB_LINE_DONE_R = crate::BitReader;
11impl R {
12 #[doc = "Bit 0 - The masked interrupt status of H264_DB_TMP_READY_INT. Valid only when the H264_DB_TMP_READY_INT_ENA is set to 1."]
13 #[inline(always)]
14 pub fn db_tmp_ready(&self) -> DB_TMP_READY_R {
15 DB_TMP_READY_R::new((self.bits & 1) != 0)
16 }
17 #[doc = "Bit 1 - The masked interrupt status of H264_REC_READY_INT. Valid only when the H264_REC_READY_INT_ENA is set to 1."]
18 #[inline(always)]
19 pub fn rec_ready(&self) -> REC_READY_R {
20 REC_READY_R::new(((self.bits >> 1) & 1) != 0)
21 }
22 #[doc = "Bit 2 - The masked interrupt status of H264_FRAME_DONE_INT. Valid only when the H264_FRAME_DONE_INT_ENA is set to 1."]
23 #[inline(always)]
24 pub fn frame_done(&self) -> FRAME_DONE_R {
25 FRAME_DONE_R::new(((self.bits >> 2) & 1) != 0)
26 }
27 #[doc = "Bit 3 - Masked status bit: The masked interrupt status of H264_DMA_MOVE_2MB_LINE_DONE_INT. Valid only when the H264_DMA_MOVE_2MB_LINE_DONE_INT_ENA is set to 1."]
28 #[inline(always)]
29 pub fn dma_move_2mb_line_done(&self) -> DMA_MOVE_2MB_LINE_DONE_R {
30 DMA_MOVE_2MB_LINE_DONE_R::new(((self.bits >> 3) & 1) != 0)
31 }
32}
33#[cfg(feature = "impl-register-debug")]
34impl core::fmt::Debug for R {
35 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
36 f.debug_struct("INT_ST")
37 .field(
38 "db_tmp_ready",
39 &format_args!("{}", self.db_tmp_ready().bit()),
40 )
41 .field("rec_ready", &format_args!("{}", self.rec_ready().bit()))
42 .field("frame_done", &format_args!("{}", self.frame_done().bit()))
43 .field(
44 "dma_move_2mb_line_done",
45 &format_args!("{}", self.dma_move_2mb_line_done().bit()),
46 )
47 .finish()
48 }
49}
50#[cfg(feature = "impl-register-debug")]
51impl core::fmt::Debug for crate::generic::Reg<INT_ST_SPEC> {
52 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
53 core::fmt::Debug::fmt(&self.read(), f)
54 }
55}
56#[doc = "Interrupt masked status register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`int_st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
57pub struct INT_ST_SPEC;
58impl crate::RegisterSpec for INT_ST_SPEC {
59 type Ux = u32;
60}
61#[doc = "`read()` method returns [`int_st::R`](R) reader structure"]
62impl crate::Readable for INT_ST_SPEC {}
63#[doc = "`reset()` method sets INT_ST to value 0"]
64impl crate::Resettable for INT_ST_SPEC {
65 const RESET_VALUE: u32 = 0;
66}