esp32p4/gpio_sd/
etm_task_p0_cfg.rs1#[doc = "Register `ETM_TASK_P0_CFG` reader"]
2pub type R = crate::R<ETM_TASK_P0_CFG_SPEC>;
3#[doc = "Register `ETM_TASK_P0_CFG` writer"]
4pub type W = crate::W<ETM_TASK_P0_CFG_SPEC>;
5#[doc = "Field `ETM_TASK_GPIO0_EN` reader - Enable bit of GPIO response etm task."]
6pub type ETM_TASK_GPIO0_EN_R = crate::BitReader;
7#[doc = "Field `ETM_TASK_GPIO0_EN` writer - Enable bit of GPIO response etm task."]
8pub type ETM_TASK_GPIO0_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `ETM_TASK_GPIO0_SEL` reader - GPIO choose a etm task channel."]
10pub type ETM_TASK_GPIO0_SEL_R = crate::FieldReader;
11#[doc = "Field `ETM_TASK_GPIO0_SEL` writer - GPIO choose a etm task channel."]
12pub type ETM_TASK_GPIO0_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
13#[doc = "Field `ETM_TASK_GPIO1_EN` reader - Enable bit of GPIO response etm task."]
14pub type ETM_TASK_GPIO1_EN_R = crate::BitReader;
15#[doc = "Field `ETM_TASK_GPIO1_EN` writer - Enable bit of GPIO response etm task."]
16pub type ETM_TASK_GPIO1_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `ETM_TASK_GPIO1_SEL` reader - GPIO choose a etm task channel."]
18pub type ETM_TASK_GPIO1_SEL_R = crate::FieldReader;
19#[doc = "Field `ETM_TASK_GPIO1_SEL` writer - GPIO choose a etm task channel."]
20pub type ETM_TASK_GPIO1_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
21#[doc = "Field `ETM_TASK_GPIO2_EN` reader - Enable bit of GPIO response etm task."]
22pub type ETM_TASK_GPIO2_EN_R = crate::BitReader;
23#[doc = "Field `ETM_TASK_GPIO2_EN` writer - Enable bit of GPIO response etm task."]
24pub type ETM_TASK_GPIO2_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
25#[doc = "Field `ETM_TASK_GPIO2_SEL` reader - GPIO choose a etm task channel."]
26pub type ETM_TASK_GPIO2_SEL_R = crate::FieldReader;
27#[doc = "Field `ETM_TASK_GPIO2_SEL` writer - GPIO choose a etm task channel."]
28pub type ETM_TASK_GPIO2_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
29#[doc = "Field `ETM_TASK_GPIO3_EN` reader - Enable bit of GPIO response etm task."]
30pub type ETM_TASK_GPIO3_EN_R = crate::BitReader;
31#[doc = "Field `ETM_TASK_GPIO3_EN` writer - Enable bit of GPIO response etm task."]
32pub type ETM_TASK_GPIO3_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
33#[doc = "Field `ETM_TASK_GPIO3_SEL` reader - GPIO choose a etm task channel."]
34pub type ETM_TASK_GPIO3_SEL_R = crate::FieldReader;
35#[doc = "Field `ETM_TASK_GPIO3_SEL` writer - GPIO choose a etm task channel."]
36pub type ETM_TASK_GPIO3_SEL_W<'a, REG> = crate::FieldWriter<'a, REG, 3>;
37impl R {
38 #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
39 #[inline(always)]
40 pub fn etm_task_gpio0_en(&self) -> ETM_TASK_GPIO0_EN_R {
41 ETM_TASK_GPIO0_EN_R::new((self.bits & 1) != 0)
42 }
43 #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
44 #[inline(always)]
45 pub fn etm_task_gpio0_sel(&self) -> ETM_TASK_GPIO0_SEL_R {
46 ETM_TASK_GPIO0_SEL_R::new(((self.bits >> 1) & 7) as u8)
47 }
48 #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
49 #[inline(always)]
50 pub fn etm_task_gpio1_en(&self) -> ETM_TASK_GPIO1_EN_R {
51 ETM_TASK_GPIO1_EN_R::new(((self.bits >> 8) & 1) != 0)
52 }
53 #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
54 #[inline(always)]
55 pub fn etm_task_gpio1_sel(&self) -> ETM_TASK_GPIO1_SEL_R {
56 ETM_TASK_GPIO1_SEL_R::new(((self.bits >> 9) & 7) as u8)
57 }
58 #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
59 #[inline(always)]
60 pub fn etm_task_gpio2_en(&self) -> ETM_TASK_GPIO2_EN_R {
61 ETM_TASK_GPIO2_EN_R::new(((self.bits >> 16) & 1) != 0)
62 }
63 #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
64 #[inline(always)]
65 pub fn etm_task_gpio2_sel(&self) -> ETM_TASK_GPIO2_SEL_R {
66 ETM_TASK_GPIO2_SEL_R::new(((self.bits >> 17) & 7) as u8)
67 }
68 #[doc = "Bit 24 - Enable bit of GPIO response etm task."]
69 #[inline(always)]
70 pub fn etm_task_gpio3_en(&self) -> ETM_TASK_GPIO3_EN_R {
71 ETM_TASK_GPIO3_EN_R::new(((self.bits >> 24) & 1) != 0)
72 }
73 #[doc = "Bits 25:27 - GPIO choose a etm task channel."]
74 #[inline(always)]
75 pub fn etm_task_gpio3_sel(&self) -> ETM_TASK_GPIO3_SEL_R {
76 ETM_TASK_GPIO3_SEL_R::new(((self.bits >> 25) & 7) as u8)
77 }
78}
79#[cfg(feature = "impl-register-debug")]
80impl core::fmt::Debug for R {
81 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
82 f.debug_struct("ETM_TASK_P0_CFG")
83 .field(
84 "etm_task_gpio0_en",
85 &format_args!("{}", self.etm_task_gpio0_en().bit()),
86 )
87 .field(
88 "etm_task_gpio0_sel",
89 &format_args!("{}", self.etm_task_gpio0_sel().bits()),
90 )
91 .field(
92 "etm_task_gpio1_en",
93 &format_args!("{}", self.etm_task_gpio1_en().bit()),
94 )
95 .field(
96 "etm_task_gpio1_sel",
97 &format_args!("{}", self.etm_task_gpio1_sel().bits()),
98 )
99 .field(
100 "etm_task_gpio2_en",
101 &format_args!("{}", self.etm_task_gpio2_en().bit()),
102 )
103 .field(
104 "etm_task_gpio2_sel",
105 &format_args!("{}", self.etm_task_gpio2_sel().bits()),
106 )
107 .field(
108 "etm_task_gpio3_en",
109 &format_args!("{}", self.etm_task_gpio3_en().bit()),
110 )
111 .field(
112 "etm_task_gpio3_sel",
113 &format_args!("{}", self.etm_task_gpio3_sel().bits()),
114 )
115 .finish()
116 }
117}
118#[cfg(feature = "impl-register-debug")]
119impl core::fmt::Debug for crate::generic::Reg<ETM_TASK_P0_CFG_SPEC> {
120 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
121 core::fmt::Debug::fmt(&self.read(), f)
122 }
123}
124impl W {
125 #[doc = "Bit 0 - Enable bit of GPIO response etm task."]
126 #[inline(always)]
127 #[must_use]
128 pub fn etm_task_gpio0_en(&mut self) -> ETM_TASK_GPIO0_EN_W<ETM_TASK_P0_CFG_SPEC> {
129 ETM_TASK_GPIO0_EN_W::new(self, 0)
130 }
131 #[doc = "Bits 1:3 - GPIO choose a etm task channel."]
132 #[inline(always)]
133 #[must_use]
134 pub fn etm_task_gpio0_sel(&mut self) -> ETM_TASK_GPIO0_SEL_W<ETM_TASK_P0_CFG_SPEC> {
135 ETM_TASK_GPIO0_SEL_W::new(self, 1)
136 }
137 #[doc = "Bit 8 - Enable bit of GPIO response etm task."]
138 #[inline(always)]
139 #[must_use]
140 pub fn etm_task_gpio1_en(&mut self) -> ETM_TASK_GPIO1_EN_W<ETM_TASK_P0_CFG_SPEC> {
141 ETM_TASK_GPIO1_EN_W::new(self, 8)
142 }
143 #[doc = "Bits 9:11 - GPIO choose a etm task channel."]
144 #[inline(always)]
145 #[must_use]
146 pub fn etm_task_gpio1_sel(&mut self) -> ETM_TASK_GPIO1_SEL_W<ETM_TASK_P0_CFG_SPEC> {
147 ETM_TASK_GPIO1_SEL_W::new(self, 9)
148 }
149 #[doc = "Bit 16 - Enable bit of GPIO response etm task."]
150 #[inline(always)]
151 #[must_use]
152 pub fn etm_task_gpio2_en(&mut self) -> ETM_TASK_GPIO2_EN_W<ETM_TASK_P0_CFG_SPEC> {
153 ETM_TASK_GPIO2_EN_W::new(self, 16)
154 }
155 #[doc = "Bits 17:19 - GPIO choose a etm task channel."]
156 #[inline(always)]
157 #[must_use]
158 pub fn etm_task_gpio2_sel(&mut self) -> ETM_TASK_GPIO2_SEL_W<ETM_TASK_P0_CFG_SPEC> {
159 ETM_TASK_GPIO2_SEL_W::new(self, 17)
160 }
161 #[doc = "Bit 24 - Enable bit of GPIO response etm task."]
162 #[inline(always)]
163 #[must_use]
164 pub fn etm_task_gpio3_en(&mut self) -> ETM_TASK_GPIO3_EN_W<ETM_TASK_P0_CFG_SPEC> {
165 ETM_TASK_GPIO3_EN_W::new(self, 24)
166 }
167 #[doc = "Bits 25:27 - GPIO choose a etm task channel."]
168 #[inline(always)]
169 #[must_use]
170 pub fn etm_task_gpio3_sel(&mut self) -> ETM_TASK_GPIO3_SEL_W<ETM_TASK_P0_CFG_SPEC> {
171 ETM_TASK_GPIO3_SEL_W::new(self, 25)
172 }
173}
174#[doc = "Etm Configure Register to decide which GPIO been chosen\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`etm_task_p0_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`etm_task_p0_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
175pub struct ETM_TASK_P0_CFG_SPEC;
176impl crate::RegisterSpec for ETM_TASK_P0_CFG_SPEC {
177 type Ux = u32;
178}
179#[doc = "`read()` method returns [`etm_task_p0_cfg::R`](R) reader structure"]
180impl crate::Readable for ETM_TASK_P0_CFG_SPEC {}
181#[doc = "`write(|w| ..)` method takes [`etm_task_p0_cfg::W`](W) writer structure"]
182impl crate::Writable for ETM_TASK_P0_CFG_SPEC {
183 type Safety = crate::Unsafe;
184 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
185 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
186}
187#[doc = "`reset()` method sets ETM_TASK_P0_CFG to value 0"]
188impl crate::Resettable for ETM_TASK_P0_CFG_SPEC {
189 const RESET_VALUE: u32 = 0;
190}