esp32p4/efuse/
wr_tim_conf0_rs_bypass.rs

1#[doc = "Register `WR_TIM_CONF0_RS_BYPASS` reader"]
2pub type R = crate::R<WR_TIM_CONF0_RS_BYPASS_SPEC>;
3#[doc = "Register `WR_TIM_CONF0_RS_BYPASS` writer"]
4pub type W = crate::W<WR_TIM_CONF0_RS_BYPASS_SPEC>;
5#[doc = "Field `BYPASS_RS_CORRECTION` reader - Set this bit to bypass reed solomon correction step."]
6pub type BYPASS_RS_CORRECTION_R = crate::BitReader;
7#[doc = "Field `BYPASS_RS_CORRECTION` writer - Set this bit to bypass reed solomon correction step."]
8pub type BYPASS_RS_CORRECTION_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `BYPASS_RS_BLK_NUM` reader - Configures block number of programming twice operation."]
10pub type BYPASS_RS_BLK_NUM_R = crate::FieldReader<u16>;
11#[doc = "Field `BYPASS_RS_BLK_NUM` writer - Configures block number of programming twice operation."]
12pub type BYPASS_RS_BLK_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 11, u16>;
13#[doc = "Field `UPDATE` writer - Set this bit to update multi-bit register signals."]
14pub type UPDATE_W<'a, REG> = crate::BitWriter<'a, REG>;
15#[doc = "Field `TPGM_INACTIVE` reader - Configures the inactive programming time."]
16pub type TPGM_INACTIVE_R = crate::FieldReader;
17#[doc = "Field `TPGM_INACTIVE` writer - Configures the inactive programming time."]
18pub type TPGM_INACTIVE_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
19impl R {
20    #[doc = "Bit 0 - Set this bit to bypass reed solomon correction step."]
21    #[inline(always)]
22    pub fn bypass_rs_correction(&self) -> BYPASS_RS_CORRECTION_R {
23        BYPASS_RS_CORRECTION_R::new((self.bits & 1) != 0)
24    }
25    #[doc = "Bits 1:11 - Configures block number of programming twice operation."]
26    #[inline(always)]
27    pub fn bypass_rs_blk_num(&self) -> BYPASS_RS_BLK_NUM_R {
28        BYPASS_RS_BLK_NUM_R::new(((self.bits >> 1) & 0x07ff) as u16)
29    }
30    #[doc = "Bits 13:20 - Configures the inactive programming time."]
31    #[inline(always)]
32    pub fn tpgm_inactive(&self) -> TPGM_INACTIVE_R {
33        TPGM_INACTIVE_R::new(((self.bits >> 13) & 0xff) as u8)
34    }
35}
36#[cfg(feature = "impl-register-debug")]
37impl core::fmt::Debug for R {
38    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
39        f.debug_struct("WR_TIM_CONF0_RS_BYPASS")
40            .field(
41                "bypass_rs_correction",
42                &format_args!("{}", self.bypass_rs_correction().bit()),
43            )
44            .field(
45                "bypass_rs_blk_num",
46                &format_args!("{}", self.bypass_rs_blk_num().bits()),
47            )
48            .field(
49                "tpgm_inactive",
50                &format_args!("{}", self.tpgm_inactive().bits()),
51            )
52            .finish()
53    }
54}
55#[cfg(feature = "impl-register-debug")]
56impl core::fmt::Debug for crate::generic::Reg<WR_TIM_CONF0_RS_BYPASS_SPEC> {
57    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
58        core::fmt::Debug::fmt(&self.read(), f)
59    }
60}
61impl W {
62    #[doc = "Bit 0 - Set this bit to bypass reed solomon correction step."]
63    #[inline(always)]
64    #[must_use]
65    pub fn bypass_rs_correction(&mut self) -> BYPASS_RS_CORRECTION_W<WR_TIM_CONF0_RS_BYPASS_SPEC> {
66        BYPASS_RS_CORRECTION_W::new(self, 0)
67    }
68    #[doc = "Bits 1:11 - Configures block number of programming twice operation."]
69    #[inline(always)]
70    #[must_use]
71    pub fn bypass_rs_blk_num(&mut self) -> BYPASS_RS_BLK_NUM_W<WR_TIM_CONF0_RS_BYPASS_SPEC> {
72        BYPASS_RS_BLK_NUM_W::new(self, 1)
73    }
74    #[doc = "Bit 12 - Set this bit to update multi-bit register signals."]
75    #[inline(always)]
76    #[must_use]
77    pub fn update(&mut self) -> UPDATE_W<WR_TIM_CONF0_RS_BYPASS_SPEC> {
78        UPDATE_W::new(self, 12)
79    }
80    #[doc = "Bits 13:20 - Configures the inactive programming time."]
81    #[inline(always)]
82    #[must_use]
83    pub fn tpgm_inactive(&mut self) -> TPGM_INACTIVE_W<WR_TIM_CONF0_RS_BYPASS_SPEC> {
84        TPGM_INACTIVE_W::new(self, 13)
85    }
86}
87#[doc = "Configurarion register0 of eFuse programming time parameters and rs bypass operation.\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`wr_tim_conf0_rs_bypass::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`wr_tim_conf0_rs_bypass::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
88pub struct WR_TIM_CONF0_RS_BYPASS_SPEC;
89impl crate::RegisterSpec for WR_TIM_CONF0_RS_BYPASS_SPEC {
90    type Ux = u32;
91}
92#[doc = "`read()` method returns [`wr_tim_conf0_rs_bypass::R`](R) reader structure"]
93impl crate::Readable for WR_TIM_CONF0_RS_BYPASS_SPEC {}
94#[doc = "`write(|w| ..)` method takes [`wr_tim_conf0_rs_bypass::W`](W) writer structure"]
95impl crate::Writable for WR_TIM_CONF0_RS_BYPASS_SPEC {
96    type Safety = crate::Unsafe;
97    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
98    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
99}
100#[doc = "`reset()` method sets WR_TIM_CONF0_RS_BYPASS to value 0x2000"]
101impl crate::Resettable for WR_TIM_CONF0_RS_BYPASS_SPEC {
102    const RESET_VALUE: u32 = 0x2000;
103}
esp32p4/efuse/wr_tim_conf0_rs_bypass.rs

esp32p4/efuse/
wr_tim_conf0_rs_bypass.rs
