esp32p4/cache/
lock_size.rs

1#[doc = "Register `LOCK_SIZE` reader"]
2pub type R = crate::R<LOCK_SIZE_SPEC>;
3#[doc = "Register `LOCK_SIZE` writer"]
4pub type W = crate::W<LOCK_SIZE_SPEC>;
5#[doc = "Field `LOCK_SIZE` reader - Those bits are used to configure the size of the lock/unlock operation, which should be used together with CACHE_LOCK_ADDR_REG"]
6pub type LOCK_SIZE_R = crate::FieldReader<u16>;
7#[doc = "Field `LOCK_SIZE` writer - Those bits are used to configure the size of the lock/unlock operation, which should be used together with CACHE_LOCK_ADDR_REG"]
8pub type LOCK_SIZE_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - Those bits are used to configure the size of the lock/unlock operation, which should be used together with CACHE_LOCK_ADDR_REG"]
11    #[inline(always)]
12    pub fn lock_size(&self) -> LOCK_SIZE_R {
13        LOCK_SIZE_R::new((self.bits & 0xffff) as u16)
14    }
15}
16#[cfg(feature = "impl-register-debug")]
17impl core::fmt::Debug for R {
18    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
19        f.debug_struct("LOCK_SIZE")
20            .field("lock_size", &format_args!("{}", self.lock_size().bits()))
21            .finish()
22    }
23}
24#[cfg(feature = "impl-register-debug")]
25impl core::fmt::Debug for crate::generic::Reg<LOCK_SIZE_SPEC> {
26    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
27        core::fmt::Debug::fmt(&self.read(), f)
28    }
29}
30impl W {
31    #[doc = "Bits 0:15 - Those bits are used to configure the size of the lock/unlock operation, which should be used together with CACHE_LOCK_ADDR_REG"]
32    #[inline(always)]
33    #[must_use]
34    pub fn lock_size(&mut self) -> LOCK_SIZE_W<LOCK_SIZE_SPEC> {
35        LOCK_SIZE_W::new(self, 0)
36    }
37}
38#[doc = "Lock (manual lock) size configure register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`lock_size::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`lock_size::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
39pub struct LOCK_SIZE_SPEC;
40impl crate::RegisterSpec for LOCK_SIZE_SPEC {
41    type Ux = u32;
42}
43#[doc = "`read()` method returns [`lock_size::R`](R) reader structure"]
44impl crate::Readable for LOCK_SIZE_SPEC {}
45#[doc = "`write(|w| ..)` method takes [`lock_size::W`](W) writer structure"]
46impl crate::Writable for LOCK_SIZE_SPEC {
47    type Safety = crate::Unsafe;
48    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
49    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
50}
51#[doc = "`reset()` method sets LOCK_SIZE to value 0"]
52impl crate::Resettable for LOCK_SIZE_SPEC {
53    const RESET_VALUE: u32 = 0;
54}