esp32p4/axi_dma/in_ch/in_int/
st.rs1#[doc = "Register `ST` reader"]
2pub type R = crate::R<ST_SPEC>;
3#[doc = "Field `IN_DONE` reader - The raw interrupt status bit for the IN_DONE_CH_INT interrupt."]
4pub type IN_DONE_R = crate::BitReader;
5#[doc = "Field `IN_SUC_EOF` reader - The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt."]
6pub type IN_SUC_EOF_R = crate::BitReader;
7#[doc = "Field `IN_ERR_EOF` reader - The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt."]
8pub type IN_ERR_EOF_R = crate::BitReader;
9#[doc = "Field `IN_DSCR_ERR` reader - The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt."]
10pub type IN_DSCR_ERR_R = crate::BitReader;
11#[doc = "Field `IN_DSCR_EMPTY` reader - The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt."]
12pub type IN_DSCR_EMPTY_R = crate::BitReader;
13#[doc = "Field `INFIFO_OVF` reader - The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt."]
14pub type INFIFO_OVF_R = crate::BitReader;
15#[doc = "Field `INFIFO_UDF` reader - The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt."]
16pub type INFIFO_UDF_R = crate::BitReader;
17#[doc = "Field `INFIFO_L1_OVF` reader - The raw interrupt status bit for the INFIFO_OVF_L2_CH_INT interrupt."]
18pub type INFIFO_L1_OVF_R = crate::BitReader;
19#[doc = "Field `INFIFO_L1_UDF` reader - The raw interrupt status bit for the INFIFO_UDF_L2_CH_INT interrupt."]
20pub type INFIFO_L1_UDF_R = crate::BitReader;
21#[doc = "Field `INFIFO_L3_OVF` reader - The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt."]
22pub type INFIFO_L3_OVF_R = crate::BitReader;
23#[doc = "Field `INFIFO_L3_UDF` reader - The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt."]
24pub type INFIFO_L3_UDF_R = crate::BitReader;
25impl R {
26 #[doc = "Bit 0 - The raw interrupt status bit for the IN_DONE_CH_INT interrupt."]
27 #[inline(always)]
28 pub fn in_done(&self) -> IN_DONE_R {
29 IN_DONE_R::new((self.bits & 1) != 0)
30 }
31 #[doc = "Bit 1 - The raw interrupt status bit for the IN_SUC_EOF_CH_INT interrupt."]
32 #[inline(always)]
33 pub fn in_suc_eof(&self) -> IN_SUC_EOF_R {
34 IN_SUC_EOF_R::new(((self.bits >> 1) & 1) != 0)
35 }
36 #[doc = "Bit 2 - The raw interrupt status bit for the IN_ERR_EOF_CH_INT interrupt."]
37 #[inline(always)]
38 pub fn in_err_eof(&self) -> IN_ERR_EOF_R {
39 IN_ERR_EOF_R::new(((self.bits >> 2) & 1) != 0)
40 }
41 #[doc = "Bit 3 - The raw interrupt status bit for the IN_DSCR_ERR_CH_INT interrupt."]
42 #[inline(always)]
43 pub fn in_dscr_err(&self) -> IN_DSCR_ERR_R {
44 IN_DSCR_ERR_R::new(((self.bits >> 3) & 1) != 0)
45 }
46 #[doc = "Bit 4 - The raw interrupt status bit for the IN_DSCR_EMPTY_CH_INT interrupt."]
47 #[inline(always)]
48 pub fn in_dscr_empty(&self) -> IN_DSCR_EMPTY_R {
49 IN_DSCR_EMPTY_R::new(((self.bits >> 4) & 1) != 0)
50 }
51 #[doc = "Bit 5 - The raw interrupt status bit for the INFIFO_OVF_L1_CH_INT interrupt."]
52 #[inline(always)]
53 pub fn infifo_ovf(&self) -> INFIFO_OVF_R {
54 INFIFO_OVF_R::new(((self.bits >> 5) & 1) != 0)
55 }
56 #[doc = "Bit 6 - The raw interrupt status bit for the INFIFO_UDF_L1_CH_INT interrupt."]
57 #[inline(always)]
58 pub fn infifo_udf(&self) -> INFIFO_UDF_R {
59 INFIFO_UDF_R::new(((self.bits >> 6) & 1) != 0)
60 }
61 #[doc = "Bit 7 - The raw interrupt status bit for the INFIFO_OVF_L2_CH_INT interrupt."]
62 #[inline(always)]
63 pub fn infifo_l1_ovf(&self) -> INFIFO_L1_OVF_R {
64 INFIFO_L1_OVF_R::new(((self.bits >> 7) & 1) != 0)
65 }
66 #[doc = "Bit 8 - The raw interrupt status bit for the INFIFO_UDF_L2_CH_INT interrupt."]
67 #[inline(always)]
68 pub fn infifo_l1_udf(&self) -> INFIFO_L1_UDF_R {
69 INFIFO_L1_UDF_R::new(((self.bits >> 8) & 1) != 0)
70 }
71 #[doc = "Bit 9 - The raw interrupt status bit for the INFIFO_OVF_L3_CH_INT interrupt."]
72 #[inline(always)]
73 pub fn infifo_l3_ovf(&self) -> INFIFO_L3_OVF_R {
74 INFIFO_L3_OVF_R::new(((self.bits >> 9) & 1) != 0)
75 }
76 #[doc = "Bit 10 - The raw interrupt status bit for the INFIFO_UDF_L3_CH_INT interrupt."]
77 #[inline(always)]
78 pub fn infifo_l3_udf(&self) -> INFIFO_L3_UDF_R {
79 INFIFO_L3_UDF_R::new(((self.bits >> 10) & 1) != 0)
80 }
81}
82#[cfg(feature = "impl-register-debug")]
83impl core::fmt::Debug for R {
84 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
85 f.debug_struct("ST")
86 .field("in_done", &format_args!("{}", self.in_done().bit()))
87 .field("in_suc_eof", &format_args!("{}", self.in_suc_eof().bit()))
88 .field("in_err_eof", &format_args!("{}", self.in_err_eof().bit()))
89 .field("in_dscr_err", &format_args!("{}", self.in_dscr_err().bit()))
90 .field(
91 "in_dscr_empty",
92 &format_args!("{}", self.in_dscr_empty().bit()),
93 )
94 .field("infifo_ovf", &format_args!("{}", self.infifo_ovf().bit()))
95 .field("infifo_udf", &format_args!("{}", self.infifo_udf().bit()))
96 .field(
97 "infifo_l1_ovf",
98 &format_args!("{}", self.infifo_l1_ovf().bit()),
99 )
100 .field(
101 "infifo_l1_udf",
102 &format_args!("{}", self.infifo_l1_udf().bit()),
103 )
104 .field(
105 "infifo_l3_ovf",
106 &format_args!("{}", self.infifo_l3_ovf().bit()),
107 )
108 .field(
109 "infifo_l3_udf",
110 &format_args!("{}", self.infifo_l3_udf().bit()),
111 )
112 .finish()
113 }
114}
115#[cfg(feature = "impl-register-debug")]
116impl core::fmt::Debug for crate::generic::Reg<ST_SPEC> {
117 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
118 core::fmt::Debug::fmt(&self.read(), f)
119 }
120}
121#[doc = "Masked interrupt of channel 0\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`st::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
122pub struct ST_SPEC;
123impl crate::RegisterSpec for ST_SPEC {
124 type Ux = u32;
125}
126#[doc = "`read()` method returns [`st::R`](R) reader structure"]
127impl crate::Readable for ST_SPEC {}
128#[doc = "`reset()` method sets ST to value 0"]
129impl crate::Resettable for ST_SPEC {
130 const RESET_VALUE: u32 = 0;
131}