esp32p4/isp/
awb_mode.rs

1#[doc = "Register `AWB_MODE` reader"]
2pub type R = crate::R<AWB_MODE_SPEC>;
3#[doc = "Register `AWB_MODE` writer"]
4pub type W = crate::W<AWB_MODE_SPEC>;
5#[doc = "Field `AWB_MODE` reader - this field configures awb algo sel. 00: none sellected. 01: sel algo0. 10: sel algo1. 11: sel both algo0 and algo1"]
6pub type AWB_MODE_R = crate::FieldReader;
7#[doc = "Field `AWB_MODE` writer - this field configures awb algo sel. 00: none sellected. 01: sel algo0. 10: sel algo1. 11: sel both algo0 and algo1"]
8pub type AWB_MODE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
9#[doc = "Field `AWB_SAMPLE` reader - this bit configures awb sample location, 0:before ccm, 1:after ccm"]
10pub type AWB_SAMPLE_R = crate::BitReader;
11#[doc = "Field `AWB_SAMPLE` writer - this bit configures awb sample location, 0:before ccm, 1:after ccm"]
12pub type AWB_SAMPLE_W<'a, REG> = crate::BitWriter<'a, REG>;
13impl R {
14    #[doc = "Bits 0:1 - this field configures awb algo sel. 00: none sellected. 01: sel algo0. 10: sel algo1. 11: sel both algo0 and algo1"]
15    #[inline(always)]
16    pub fn awb_mode(&self) -> AWB_MODE_R {
17        AWB_MODE_R::new((self.bits & 3) as u8)
18    }
19    #[doc = "Bit 4 - this bit configures awb sample location, 0:before ccm, 1:after ccm"]
20    #[inline(always)]
21    pub fn awb_sample(&self) -> AWB_SAMPLE_R {
22        AWB_SAMPLE_R::new(((self.bits >> 4) & 1) != 0)
23    }
24}
25#[cfg(feature = "impl-register-debug")]
26impl core::fmt::Debug for R {
27    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
28        f.debug_struct("AWB_MODE")
29            .field("awb_mode", &format_args!("{}", self.awb_mode().bits()))
30            .field("awb_sample", &format_args!("{}", self.awb_sample().bit()))
31            .finish()
32    }
33}
34#[cfg(feature = "impl-register-debug")]
35impl core::fmt::Debug for crate::generic::Reg<AWB_MODE_SPEC> {
36    fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
37        core::fmt::Debug::fmt(&self.read(), f)
38    }
39}
40impl W {
41    #[doc = "Bits 0:1 - this field configures awb algo sel. 00: none sellected. 01: sel algo0. 10: sel algo1. 11: sel both algo0 and algo1"]
42    #[inline(always)]
43    #[must_use]
44    pub fn awb_mode(&mut self) -> AWB_MODE_W<AWB_MODE_SPEC> {
45        AWB_MODE_W::new(self, 0)
46    }
47    #[doc = "Bit 4 - this bit configures awb sample location, 0:before ccm, 1:after ccm"]
48    #[inline(always)]
49    #[must_use]
50    pub fn awb_sample(&mut self) -> AWB_SAMPLE_W<AWB_MODE_SPEC> {
51        AWB_SAMPLE_W::new(self, 4)
52    }
53}
54#[doc = "awb mode control register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`awb_mode::R`](R).  You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`awb_mode::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
55pub struct AWB_MODE_SPEC;
56impl crate::RegisterSpec for AWB_MODE_SPEC {
57    type Ux = u32;
58}
59#[doc = "`read()` method returns [`awb_mode::R`](R) reader structure"]
60impl crate::Readable for AWB_MODE_SPEC {}
61#[doc = "`write(|w| ..)` method takes [`awb_mode::W`](W) writer structure"]
62impl crate::Writable for AWB_MODE_SPEC {
63    type Safety = crate::Unsafe;
64    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
65    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
66}
67#[doc = "`reset()` method sets AWB_MODE to value 0x03"]
68impl crate::Resettable for AWB_MODE_SPEC {
69    const RESET_VALUE: u32 = 0x03;
70}
esp32p4/isp/awb_mode.rs

esp32p4/isp/
awb_mode.rs
