esp32p4/cache/
l2_cache_sync_preload_exception.rs1#[doc = "Register `L2_CACHE_SYNC_PRELOAD_EXCEPTION` reader"]
2pub type R = crate::R<L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC>;
3#[doc = "Field `L2_CACHE_PLD_ERR_CODE` reader - The value 2 is Only available which means preload size is error in L2-Cache."]
4pub type L2_CACHE_PLD_ERR_CODE_R = crate::FieldReader;
5impl R {
6 #[doc = "Bits 10:11 - The value 2 is Only available which means preload size is error in L2-Cache."]
7 #[inline(always)]
8 pub fn l2_cache_pld_err_code(&self) -> L2_CACHE_PLD_ERR_CODE_R {
9 L2_CACHE_PLD_ERR_CODE_R::new(((self.bits >> 10) & 3) as u8)
10 }
11}
12#[cfg(feature = "impl-register-debug")]
13impl core::fmt::Debug for R {
14 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
15 f.debug_struct("L2_CACHE_SYNC_PRELOAD_EXCEPTION")
16 .field(
17 "l2_cache_pld_err_code",
18 &format_args!("{}", self.l2_cache_pld_err_code().bits()),
19 )
20 .finish()
21 }
22}
23#[cfg(feature = "impl-register-debug")]
24impl core::fmt::Debug for crate::generic::Reg<L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC> {
25 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
26 core::fmt::Debug::fmt(&self.read(), f)
27 }
28}
29#[doc = "Cache Sync/Preload Operation exception register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`l2_cache_sync_preload_exception::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
30pub struct L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC;
31impl crate::RegisterSpec for L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC {
32 type Ux = u32;
33}
34#[doc = "`read()` method returns [`l2_cache_sync_preload_exception::R`](R) reader structure"]
35impl crate::Readable for L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC {}
36#[doc = "`reset()` method sets L2_CACHE_SYNC_PRELOAD_EXCEPTION to value 0"]
37impl crate::Resettable for L2_CACHE_SYNC_PRELOAD_EXCEPTION_SPEC {
38 const RESET_VALUE: u32 = 0;
39}