Module sram_cmd

Source
Expand description

SPI0 external RAM mode control register

Structs§

SRAM_CMD_SPEC
SPI0 external RAM mode control register

Type Aliases§

R
Register SRAM_CMD reader
SADDR_DUAL_R
Field SADDR_DUAL reader - For SPI0 external RAM , address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SADDR_DUAL_W
Field SADDR_DUAL writer - For SPI0 external RAM , address phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SADDR_OCT_R
Field SADDR_OCT reader - For SPI0 external RAM , address phase apply 4 signals. 1: enable 0: disable.
SADDR_OCT_W
Field SADDR_OCT writer - For SPI0 external RAM , address phase apply 4 signals. 1: enable 0: disable.
SADDR_QUAD_R
Field SADDR_QUAD reader - For SPI0 external RAM , address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SADDR_QUAD_W
Field SADDR_QUAD writer - For SPI0 external RAM , address phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SCLK_MODE_R
Field SCLK_MODE reader - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is always on.
SCLK_MODE_W
Field SCLK_MODE writer - SPI clock mode bits. 0: SPI clock is off when CS inactive 1: SPI clock is delayed one cycle after CS inactive 2: SPI clock is delayed two cycles after CS inactive 3: SPI clock is always on.
SCMD_OCT_R
Field SCMD_OCT reader - For SPI0 external RAM , cmd phase apply 8 signals. 1: enable 0: disable.
SCMD_OCT_W
Field SCMD_OCT writer - For SPI0 external RAM , cmd phase apply 8 signals. 1: enable 0: disable.
SCMD_QUAD_R
Field SCMD_QUAD reader - For SPI0 external RAM , cmd phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SCMD_QUAD_W
Field SCMD_QUAD writer - For SPI0 external RAM , cmd phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SDIN_DUAL_R
Field SDIN_DUAL reader - For SPI0 external RAM , din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SDIN_DUAL_W
Field SDIN_DUAL writer - For SPI0 external RAM , din phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SDIN_HEX_R
Field SDIN_HEX reader - For SPI0 external RAM , din phase apply 16 signals. 1: enable 0: disable.
SDIN_HEX_W
Field SDIN_HEX writer - For SPI0 external RAM , din phase apply 16 signals. 1: enable 0: disable.
SDIN_OCT_R
Field SDIN_OCT reader - For SPI0 external RAM , din phase apply 8 signals. 1: enable 0: disable.
SDIN_OCT_W
Field SDIN_OCT writer - For SPI0 external RAM , din phase apply 8 signals. 1: enable 0: disable.
SDIN_QUAD_R
Field SDIN_QUAD reader - For SPI0 external RAM , din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SDIN_QUAD_W
Field SDIN_QUAD writer - For SPI0 external RAM , din phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SDOUT_DUAL_R
Field SDOUT_DUAL reader - For SPI0 external RAM , dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SDOUT_DUAL_W
Field SDOUT_DUAL writer - For SPI0 external RAM , dout phase apply 2 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_dio.
SDOUT_HEX_R
Field SDOUT_HEX reader - For SPI0 external RAM , dout phase apply 16 signals. 1: enable 0: disable.
SDOUT_HEX_W
Field SDOUT_HEX writer - For SPI0 external RAM , dout phase apply 16 signals. 1: enable 0: disable.
SDOUT_OCT_R
Field SDOUT_OCT reader - For SPI0 external RAM , dout phase apply 8 signals. 1: enable 0: disable.
SDOUT_OCT_W
Field SDOUT_OCT writer - For SPI0 external RAM , dout phase apply 8 signals. 1: enable 0: disable.
SDOUT_QUAD_R
Field SDOUT_QUAD reader - For SPI0 external RAM , dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SDOUT_QUAD_W
Field SDOUT_QUAD writer - For SPI0 external RAM , dout phase apply 4 signals. 1: enable 0: disable. The bit is the same with spi_mem_usr_sram_qio.
SDUMMY_RIN_R
Field SDUMMY_RIN reader - In the dummy phase of a MSPI read data transfer when accesses to external RAM, the signal level of SPI bus is output by the MSPI controller.
SDUMMY_RIN_W
Field SDUMMY_RIN writer - In the dummy phase of a MSPI read data transfer when accesses to external RAM, the signal level of SPI bus is output by the MSPI controller.
SDUMMY_WOUT_R
Field SDUMMY_WOUT reader - In the dummy phase of a MSPI write data transfer when accesses to external RAM, the signal level of SPI bus is output by the MSPI controller.
SDUMMY_WOUT_W
Field SDUMMY_WOUT writer - In the dummy phase of a MSPI write data transfer when accesses to external RAM, the signal level of SPI bus is output by the MSPI controller.
SPI_SMEM_DATA_IE_ALWAYS_ON_R
Field SPI_SMEM_DATA_IE_ALWAYS_ON reader - When accesses to external RAM, 1: the IE signals of pads connected to SPI_IO[7:0] are always 1. 0: Others.
SPI_SMEM_DATA_IE_ALWAYS_ON_W
Field SPI_SMEM_DATA_IE_ALWAYS_ON writer - When accesses to external RAM, 1: the IE signals of pads connected to SPI_IO[7:0] are always 1. 0: Others.
SPI_SMEM_DQS_IE_ALWAYS_ON_R
Field SPI_SMEM_DQS_IE_ALWAYS_ON reader - When accesses to external RAM, 1: the IE signals of pads connected to SPI_DQS are always 1. 0: Others.
SPI_SMEM_DQS_IE_ALWAYS_ON_W
Field SPI_SMEM_DQS_IE_ALWAYS_ON writer - When accesses to external RAM, 1: the IE signals of pads connected to SPI_DQS are always 1. 0: Others.
SPI_SMEM_WDUMMY_ALWAYS_OUT_R
Field SPI_SMEM_WDUMMY_ALWAYS_OUT reader - In the dummy phase of an MSPI write data transfer when accesses to external RAM, the level of SPI_IO[7:0] is output by the MSPI controller.
SPI_SMEM_WDUMMY_ALWAYS_OUT_W
Field SPI_SMEM_WDUMMY_ALWAYS_OUT writer - In the dummy phase of an MSPI write data transfer when accesses to external RAM, the level of SPI_IO[7:0] is output by the MSPI controller.
SPI_SMEM_WDUMMY_DQS_ALWAYS_OUT_R
Field SPI_SMEM_WDUMMY_DQS_ALWAYS_OUT reader - In the dummy phase of an MSPI write data transfer when accesses to external RAM, the level of SPI_DQS is output by the MSPI controller.
SPI_SMEM_WDUMMY_DQS_ALWAYS_OUT_W
Field SPI_SMEM_WDUMMY_DQS_ALWAYS_OUT writer - In the dummy phase of an MSPI write data transfer when accesses to external RAM, the level of SPI_DQS is output by the MSPI controller.
SWB_MODE_R
Field SWB_MODE reader - Mode bits in the external RAM fast read mode it is combined with spi_mem_fastrd_mode bit.
SWB_MODE_W
Field SWB_MODE writer - Mode bits in the external RAM fast read mode it is combined with spi_mem_fastrd_mode bit.
W
Register SRAM_CMD writer