Expand description
SPI USER control register 2
Structs§
- USER2_
SPEC - SPI USER control register 2
Type Aliases§
- MST_
REMPTY_ ERR_ END_ EN_ R - Field
MST_REMPTY_ERR_END_EN
reader - 1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. - MST_
REMPTY_ ERR_ END_ EN_ W - Field
MST_REMPTY_ERR_END_EN
writer - 1: SPI transfer is ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. 0: SPI transfer is not ended when SPI TX AFIFO read empty error is valid in GP-SPI master FD/HD-mode. - R
- Register
USER2
reader - USR_
COMMAND_ BITLEN_ R - Field
USR_COMMAND_BITLEN
reader - The length in bits of command phase. The register value shall be (bit_num-1). Can be configured in CONF state. - USR_
COMMAND_ BITLEN_ W - Field
USR_COMMAND_BITLEN
writer - The length in bits of command phase. The register value shall be (bit_num-1). Can be configured in CONF state. - USR_
COMMAND_ VALUE_ R - Field
USR_COMMAND_VALUE
reader - The value of command. Can be configured in CONF state. - USR_
COMMAND_ VALUE_ W - Field
USR_COMMAND_VALUE
writer - The value of command. Can be configured in CONF state. - W
- Register
USER2
writer