Module h264_dma

Source
Expand description

H264 Encoder (DMA)

Re-exports§

pub use self::out_ch::OUT_CH;
pub use self::in_ch::IN_CH;
pub use self::in_ch5::IN_CH5;

Modules§

counter_rst
counter reset register
date
reserved
exter_axi_err
exter memory axi err register
exter_mem_end_addr0
end address of exter memory range0 register
exter_mem_end_addr1
end address of exter memory range1 register
exter_mem_start_addr0
Start address of exter memory range0 register
exter_mem_start_addr1
Start address of exter memory range1 register
in_arb_config
reserved
in_ch
Cluster Cluster IN_CH%s, containing IN_CONF0_CH[0-4], IN_INT_RAW_CH[0-4], IN_INT_ENA_CH[0-4], IN_INT_ST_CH[0-4], IN_INT_CLR_CH[0-4], INFIFO_STATUS_CH[0-4], IN_POP_CH[0-4], IN_LINK_CONF_CH[0-4], IN_LINK_ADDR_CH[0-4], IN_STATE_CH[0-4], IN_SUC_EOF_DES_ADDR_CH[0-4], IN_ERR_EOF_DES_ADDR_CH[0-4], IN_DSCR_CH[0-4], IN_DSCR_BF0_CH[0-4], IN_DSCR_BF1_CH[0-4], IN_ARB_CH[0-4], IN_RO_PD_CONF_CH[0-4], IN_ETM_CONF_CH[0-4], IN_FIFO_CNT_CH[0-4], IN_POP_DATA_CNT_CH[0-4], IN_XADDR_CH[0-4], IN_BUF_HB_RCV_CH[0-4]
in_ch5
Cluster Cluster IN_CH5, containing IN_CONF0_CH5, IN_CONF1_CH5, IN_CONF2_CH5, IN_CONF3_CH5, IN_INT_RAW_CH5, IN_INT_ENA_CH5, IN_INT_ST_CH5, IN_INT_CLR_CH5, INFIFO_STATUS_CH5, IN_POP_CH5, IN_STATE_CH5, IN_ARB_CH5, IN_FIFO_CNT_CH5, IN_POP_DATA_CNT_CH5, IN_XADDR_CH5, IN_BUF_HB_RCV_CH5
inter_axi_err
inter memory axi err register
inter_mem_end_addr0
end address of inter memory range0 register
inter_mem_end_addr1
end address of inter memory range1 register
inter_mem_start_addr0
Start address of inter memory range0 register
inter_mem_start_addr1
Start address of inter memory range1 register
out_arb_config
reserved
out_ch
Cluster Cluster OUT_CH%s, containing OUT_CONF0_CH?, OUT_INT_RAW_CH?, OUT_INT_ENA_CH?, OUT_INT_ST_CH?, OUT_INT_CLR_CH?, OUTFIFO_STATUS_CH?, OUT_PUSH_CH?, OUT_LINK_CONF_CH?, OUT_LINK_ADDR_CH?, OUT_STATE_CH?, OUT_EOF_DES_ADDR_CH?, OUT_DSCR_CH?, OUT_DSCR_BF0_CH?, OUT_DSCR_BF1_CH?, OUT_ARB_CH?, OUT_RO_STATUS_CH?, OUT_RO_PD_CONF_CH?, OUT_MODE_ENABLE_CH?, OUT_MODE_YUV_CH?, OUT_ETM_CONF_CH?, OUT_BUF_LEN_CH?, OUT_FIFO_BCNT_CH?, OUT_PUSH_BYTECNT_CH?, OUT_XADDR_CH?, OUT_BLOCK_BUF_LEN_CH?
rst_conf
axi reset config register
rx_ch0_counter
rx ch0 counter register
rx_ch1_counter
rx ch1 counter register
rx_ch2_counter
rx ch2 counter register
rx_ch5_counter
rx ch5 counter register

Structs§

RegisterBlock
Register block

Type Aliases§

COUNTER_RST
COUNTER_RST (rw) register accessor: counter reset register
DATE
DATE (rw) register accessor: reserved
EXTER_AXI_ERR
EXTER_AXI_ERR (r) register accessor: exter memory axi err register
EXTER_MEM_END_ADDR0
EXTER_MEM_END_ADDR0 (rw) register accessor: end address of exter memory range0 register
EXTER_MEM_END_ADDR1
EXTER_MEM_END_ADDR1 (rw) register accessor: end address of exter memory range1 register
EXTER_MEM_START_ADDR0
EXTER_MEM_START_ADDR0 (rw) register accessor: Start address of exter memory range0 register
EXTER_MEM_START_ADDR1
EXTER_MEM_START_ADDR1 (rw) register accessor: Start address of exter memory range1 register
INTER_AXI_ERR
INTER_AXI_ERR (r) register accessor: inter memory axi err register
INTER_MEM_END_ADDR0
INTER_MEM_END_ADDR0 (rw) register accessor: end address of inter memory range0 register
INTER_MEM_END_ADDR1
INTER_MEM_END_ADDR1 (rw) register accessor: end address of inter memory range1 register
INTER_MEM_START_ADDR0
INTER_MEM_START_ADDR0 (rw) register accessor: Start address of inter memory range0 register
INTER_MEM_START_ADDR1
INTER_MEM_START_ADDR1 (rw) register accessor: Start address of inter memory range1 register
IN_ARB_CONFIG
IN_ARB_CONFIG (rw) register accessor: reserved
OUT_ARB_CONFIG
OUT_ARB_CONFIG (rw) register accessor: reserved
RST_CONF
RST_CONF (rw) register accessor: axi reset config register
RX_CH0_COUNTER
RX_CH0_COUNTER (r) register accessor: rx ch0 counter register
RX_CH1_COUNTER
RX_CH1_COUNTER (r) register accessor: rx ch1 counter register
RX_CH2_COUNTER
RX_CH2_COUNTER (r) register accessor: rx ch2 counter register
RX_CH5_COUNTER
RX_CH5_COUNTER (r) register accessor: rx ch5 counter register