esp32p4/hp_sys/
rng_cfg.rs1#[doc = "Register `RNG_CFG` reader"]
2pub type R = crate::R<RNG_CFG_SPEC>;
3#[doc = "Register `RNG_CFG` writer"]
4pub type W = crate::W<RNG_CFG_SPEC>;
5#[doc = "Field `RNG_SAMPLE_ENABLE` reader - enable rng sample chain"]
6pub type RNG_SAMPLE_ENABLE_R = crate::BitReader;
7#[doc = "Field `RNG_SAMPLE_ENABLE` writer - enable rng sample chain"]
8pub type RNG_SAMPLE_ENABLE_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `RNG_CHAIN_CLK_DIV_NUM` reader - chain clk div num to pad for debug"]
10pub type RNG_CHAIN_CLK_DIV_NUM_R = crate::FieldReader;
11#[doc = "Field `RNG_CHAIN_CLK_DIV_NUM` writer - chain clk div num to pad for debug"]
12pub type RNG_CHAIN_CLK_DIV_NUM_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
13#[doc = "Field `RNG_SAMPLE_CNT` reader - debug rng sample cnt"]
14pub type RNG_SAMPLE_CNT_R = crate::FieldReader;
15impl R {
16 #[doc = "Bit 0 - enable rng sample chain"]
17 #[inline(always)]
18 pub fn rng_sample_enable(&self) -> RNG_SAMPLE_ENABLE_R {
19 RNG_SAMPLE_ENABLE_R::new((self.bits & 1) != 0)
20 }
21 #[doc = "Bits 16:23 - chain clk div num to pad for debug"]
22 #[inline(always)]
23 pub fn rng_chain_clk_div_num(&self) -> RNG_CHAIN_CLK_DIV_NUM_R {
24 RNG_CHAIN_CLK_DIV_NUM_R::new(((self.bits >> 16) & 0xff) as u8)
25 }
26 #[doc = "Bits 24:31 - debug rng sample cnt"]
27 #[inline(always)]
28 pub fn rng_sample_cnt(&self) -> RNG_SAMPLE_CNT_R {
29 RNG_SAMPLE_CNT_R::new(((self.bits >> 24) & 0xff) as u8)
30 }
31}
32#[cfg(feature = "impl-register-debug")]
33impl core::fmt::Debug for R {
34 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
35 f.debug_struct("RNG_CFG")
36 .field(
37 "rng_sample_enable",
38 &format_args!("{}", self.rng_sample_enable().bit()),
39 )
40 .field(
41 "rng_chain_clk_div_num",
42 &format_args!("{}", self.rng_chain_clk_div_num().bits()),
43 )
44 .field(
45 "rng_sample_cnt",
46 &format_args!("{}", self.rng_sample_cnt().bits()),
47 )
48 .finish()
49 }
50}
51#[cfg(feature = "impl-register-debug")]
52impl core::fmt::Debug for crate::generic::Reg<RNG_CFG_SPEC> {
53 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
54 core::fmt::Debug::fmt(&self.read(), f)
55 }
56}
57impl W {
58 #[doc = "Bit 0 - enable rng sample chain"]
59 #[inline(always)]
60 #[must_use]
61 pub fn rng_sample_enable(&mut self) -> RNG_SAMPLE_ENABLE_W<RNG_CFG_SPEC> {
62 RNG_SAMPLE_ENABLE_W::new(self, 0)
63 }
64 #[doc = "Bits 16:23 - chain clk div num to pad for debug"]
65 #[inline(always)]
66 #[must_use]
67 pub fn rng_chain_clk_div_num(&mut self) -> RNG_CHAIN_CLK_DIV_NUM_W<RNG_CFG_SPEC> {
68 RNG_CHAIN_CLK_DIV_NUM_W::new(self, 16)
69 }
70}
71#[doc = "rng cfg register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`rng_cfg::R`](R). You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`rng_cfg::W`](W). You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
72pub struct RNG_CFG_SPEC;
73impl crate::RegisterSpec for RNG_CFG_SPEC {
74 type Ux = u32;
75}
76#[doc = "`read()` method returns [`rng_cfg::R`](R) reader structure"]
77impl crate::Readable for RNG_CFG_SPEC {}
78#[doc = "`write(|w| ..)` method takes [`rng_cfg::W`](W) writer structure"]
79impl crate::Writable for RNG_CFG_SPEC {
80 type Safety = crate::Unsafe;
81 const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
82 const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
83}
84#[doc = "`reset()` method sets RNG_CFG to value 0"]
85impl crate::Resettable for RNG_CFG_SPEC {
86 const RESET_VALUE: u32 = 0;
87}