Module esp32p4::spi1::spi_mem_clock

SPI1 clock division control register.

Structs

• SPI_MEM_CLOCK_SPEC
  SPI1 clock division control register.

Type Aliases

• R
  Register SPI_MEM_CLOCK reader
• SPI_MEM_CLKCNT_H_R
  Field SPI_MEM_CLKCNT_H reader - In the master mode it must be floor((spi_mem_clkcnt_N+1)/2-1).
• SPI_MEM_CLKCNT_H_W
  Field SPI_MEM_CLKCNT_H writer - In the master mode it must be floor((spi_mem_clkcnt_N+1)/2-1).
• SPI_MEM_CLKCNT_L_R
  Field SPI_MEM_CLKCNT_L reader - In the master mode it must be equal to spi_mem_clkcnt_N.
• SPI_MEM_CLKCNT_L_W
  Field SPI_MEM_CLKCNT_L writer - In the master mode it must be equal to spi_mem_clkcnt_N.
• SPI_MEM_CLKCNT_N_R
  Field SPI_MEM_CLKCNT_N reader - In the master mode it is the divider of spi_mem_clk. So spi_mem_clk frequency is system/(spi_mem_clkcnt_N+1)
• SPI_MEM_CLKCNT_N_W
  Field SPI_MEM_CLKCNT_N writer - In the master mode it is the divider of spi_mem_clk. So spi_mem_clk frequency is system/(spi_mem_clkcnt_N+1)
• SPI_MEM_CLK_EQU_SYSCLK_R
  Field SPI_MEM_CLK_EQU_SYSCLK reader - reserved
• SPI_MEM_CLK_EQU_SYSCLK_W
  Field SPI_MEM_CLK_EQU_SYSCLK writer - reserved
• W
  Register SPI_MEM_CLOCK writer