esp32h2/
pcr.rs

1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5    uart: [UART; 2],
6    mspi_conf: MSPI_CONF,
7    mspi_clk_conf: MSPI_CLK_CONF,
8    i2c0_conf: I2C0_CONF,
9    i2c0_sclk_conf: I2C0_SCLK_CONF,
10    i2c1_conf: I2C1_CONF,
11    i2c1_sclk_conf: I2C1_SCLK_CONF,
12    uhci_conf: UHCI_CONF,
13    rmt_conf: RMT_CONF,
14    rmt_sclk_conf: RMT_SCLK_CONF,
15    ledc_conf: LEDC_CONF,
16    ledc_sclk_conf: LEDC_SCLK_CONF,
17    timergroup0_conf: TIMERGROUP0_CONF,
18    timergroup0_timer_clk_conf: TIMERGROUP0_TIMER_CLK_CONF,
19    timergroup0_wdt_clk_conf: TIMERGROUP0_WDT_CLK_CONF,
20    timergroup1_conf: TIMERGROUP1_CONF,
21    timergroup1_timer_clk_conf: TIMERGROUP1_TIMER_CLK_CONF,
22    timergroup1_wdt_clk_conf: TIMERGROUP1_WDT_CLK_CONF,
23    systimer_conf: SYSTIMER_CONF,
24    systimer_func_clk_conf: SYSTIMER_FUNC_CLK_CONF,
25    twai0_conf: TWAI0_CONF,
26    twai0_func_clk_conf: TWAI0_FUNC_CLK_CONF,
27    i2s_conf: I2S_CONF,
28    i2s_tx_clkm_conf: I2S_TX_CLKM_CONF,
29    i2s_tx_clkm_div_conf: I2S_TX_CLKM_DIV_CONF,
30    i2s_rx_clkm_conf: I2S_RX_CLKM_CONF,
31    i2s_rx_clkm_div_conf: I2S_RX_CLKM_DIV_CONF,
32    saradc_conf: SARADC_CONF,
33    saradc_clkm_conf: SARADC_CLKM_CONF,
34    tsens_clk_conf: TSENS_CLK_CONF,
35    usb_device_conf: USB_DEVICE_CONF,
36    intmtx_conf: INTMTX_CONF,
37    pcnt_conf: PCNT_CONF,
38    etm_conf: ETM_CONF,
39    pwm_conf: PWM_CONF,
40    pwm_clk_conf: PWM_CLK_CONF,
41    parl_io_conf: PARL_IO_CONF,
42    parl_clk_rx_conf: PARL_CLK_RX_CONF,
43    parl_clk_tx_conf: PARL_CLK_TX_CONF,
44    pvt_monitor_conf: PVT_MONITOR_CONF,
45    pvt_monitor_func_clk_conf: PVT_MONITOR_FUNC_CLK_CONF,
46    gdma_conf: GDMA_CONF,
47    spi2_conf: SPI2_CONF,
48    spi2_clkm_conf: SPI2_CLKM_CONF,
49    aes_conf: AES_CONF,
50    sha_conf: SHA_CONF,
51    rsa_conf: RSA_CONF,
52    rsa_pd_ctrl: RSA_PD_CTRL,
53    ecc_conf: ECC_CONF,
54    ecc_pd_ctrl: ECC_PD_CTRL,
55    ds_conf: DS_CONF,
56    hmac_conf: HMAC_CONF,
57    ecdsa_conf: ECDSA_CONF,
58    iomux_conf: IOMUX_CONF,
59    iomux_clk_conf: IOMUX_CLK_CONF,
60    mem_monitor_conf: MEM_MONITOR_CONF,
61    regdma_conf: REGDMA_CONF,
62    trace_conf: TRACE_CONF,
63    assist_conf: ASSIST_CONF,
64    cache_conf: CACHE_CONF,
65    modem_conf: MODEM_CONF,
66    timeout_conf: TIMEOUT_CONF,
67    sysclk_conf: SYSCLK_CONF,
68    cpu_waiti_conf: CPU_WAITI_CONF,
69    cpu_freq_conf: CPU_FREQ_CONF,
70    ahb_freq_conf: AHB_FREQ_CONF,
71    apb_freq_conf: APB_FREQ_CONF,
72    sysclk_freq_query_0: SYSCLK_FREQ_QUERY_0,
73    pll_div_clk_en: PLL_DIV_CLK_EN,
74    ctrl_clk_out_en: CTRL_CLK_OUT_EN,
75    ctrl_tick_conf: CTRL_TICK_CONF,
76    ctrl_32k_conf: CTRL_32K_CONF,
77    sram_power_conf_0: SRAM_POWER_CONF_0,
78    sram_power_conf_1: SRAM_POWER_CONF_1,
79    sec_conf: SEC_CONF,
80    adc_inv_phase_conf: ADC_INV_PHASE_CONF,
81    sdm_inv_phase_conf: SDM_INV_PHASE_CONF,
82    bus_clk_update: BUS_CLK_UPDATE,
83    sar_clk_div: SAR_CLK_DIV,
84    pwdet_sar_clk_conf: PWDET_SAR_CLK_CONF,
85    _reserved80: [u8; 0x0e9c],
86    reset_event_bypass: RESET_EVENT_BYPASS,
87    fpga_debug: FPGA_DEBUG,
88    clock_gate: CLOCK_GATE,
89    date: DATE,
90}
91impl RegisterBlock {
92    #[doc = "0x00..0x18 - Cluster UART%s, containing UART?_CONF, UART?_SCLK_CONF, UART?_PD_CTRL"]
93    #[inline(always)]
94    pub const fn uart(&self, n: usize) -> &UART {
95        &self.uart[n]
96    }
97    #[doc = "Iterator for array of:"]
98    #[doc = "0x00..0x18 - Cluster UART%s, containing UART?_CONF, UART?_SCLK_CONF, UART?_PD_CTRL"]
99    #[inline(always)]
100    pub fn uart_iter(&self) -> impl Iterator<Item = &UART> {
101        self.uart.iter()
102    }
103    #[doc = "0x18 - MSPI configuration register"]
104    #[inline(always)]
105    pub const fn mspi_conf(&self) -> &MSPI_CONF {
106        &self.mspi_conf
107    }
108    #[doc = "0x1c - MSPI_CLK configuration register"]
109    #[inline(always)]
110    pub const fn mspi_clk_conf(&self) -> &MSPI_CLK_CONF {
111        &self.mspi_clk_conf
112    }
113    #[doc = "0x20 - I2C configuration register"]
114    #[inline(always)]
115    pub const fn i2c0_conf(&self) -> &I2C0_CONF {
116        &self.i2c0_conf
117    }
118    #[doc = "0x24 - I2C_SCLK configuration register"]
119    #[inline(always)]
120    pub const fn i2c0_sclk_conf(&self) -> &I2C0_SCLK_CONF {
121        &self.i2c0_sclk_conf
122    }
123    #[doc = "0x28 - I2C configuration register"]
124    #[inline(always)]
125    pub const fn i2c1_conf(&self) -> &I2C1_CONF {
126        &self.i2c1_conf
127    }
128    #[doc = "0x2c - I2C_SCLK configuration register"]
129    #[inline(always)]
130    pub const fn i2c1_sclk_conf(&self) -> &I2C1_SCLK_CONF {
131        &self.i2c1_sclk_conf
132    }
133    #[doc = "0x30 - UHCI configuration register"]
134    #[inline(always)]
135    pub const fn uhci_conf(&self) -> &UHCI_CONF {
136        &self.uhci_conf
137    }
138    #[doc = "0x34 - RMT configuration register"]
139    #[inline(always)]
140    pub const fn rmt_conf(&self) -> &RMT_CONF {
141        &self.rmt_conf
142    }
143    #[doc = "0x38 - RMT_SCLK configuration register"]
144    #[inline(always)]
145    pub const fn rmt_sclk_conf(&self) -> &RMT_SCLK_CONF {
146        &self.rmt_sclk_conf
147    }
148    #[doc = "0x3c - LEDC configuration register"]
149    #[inline(always)]
150    pub const fn ledc_conf(&self) -> &LEDC_CONF {
151        &self.ledc_conf
152    }
153    #[doc = "0x40 - LEDC_SCLK configuration register"]
154    #[inline(always)]
155    pub const fn ledc_sclk_conf(&self) -> &LEDC_SCLK_CONF {
156        &self.ledc_sclk_conf
157    }
158    #[doc = "0x44 - TIMERGROUP0 configuration register"]
159    #[inline(always)]
160    pub const fn timergroup0_conf(&self) -> &TIMERGROUP0_CONF {
161        &self.timergroup0_conf
162    }
163    #[doc = "0x48 - TIMERGROUP0_TIMER_CLK configuration register"]
164    #[inline(always)]
165    pub const fn timergroup0_timer_clk_conf(&self) -> &TIMERGROUP0_TIMER_CLK_CONF {
166        &self.timergroup0_timer_clk_conf
167    }
168    #[doc = "0x4c - TIMERGROUP0_WDT_CLK configuration register"]
169    #[inline(always)]
170    pub const fn timergroup0_wdt_clk_conf(&self) -> &TIMERGROUP0_WDT_CLK_CONF {
171        &self.timergroup0_wdt_clk_conf
172    }
173    #[doc = "0x50 - TIMERGROUP1 configuration register"]
174    #[inline(always)]
175    pub const fn timergroup1_conf(&self) -> &TIMERGROUP1_CONF {
176        &self.timergroup1_conf
177    }
178    #[doc = "0x54 - TIMERGROUP1_TIMER_CLK configuration register"]
179    #[inline(always)]
180    pub const fn timergroup1_timer_clk_conf(&self) -> &TIMERGROUP1_TIMER_CLK_CONF {
181        &self.timergroup1_timer_clk_conf
182    }
183    #[doc = "0x58 - TIMERGROUP1_WDT_CLK configuration register"]
184    #[inline(always)]
185    pub const fn timergroup1_wdt_clk_conf(&self) -> &TIMERGROUP1_WDT_CLK_CONF {
186        &self.timergroup1_wdt_clk_conf
187    }
188    #[doc = "0x5c - SYSTIMER configuration register"]
189    #[inline(always)]
190    pub const fn systimer_conf(&self) -> &SYSTIMER_CONF {
191        &self.systimer_conf
192    }
193    #[doc = "0x60 - SYSTIMER_FUNC_CLK configuration register"]
194    #[inline(always)]
195    pub const fn systimer_func_clk_conf(&self) -> &SYSTIMER_FUNC_CLK_CONF {
196        &self.systimer_func_clk_conf
197    }
198    #[doc = "0x64 - TWAI0 configuration register"]
199    #[inline(always)]
200    pub const fn twai0_conf(&self) -> &TWAI0_CONF {
201        &self.twai0_conf
202    }
203    #[doc = "0x68 - TWAI0_FUNC_CLK configuration register"]
204    #[inline(always)]
205    pub const fn twai0_func_clk_conf(&self) -> &TWAI0_FUNC_CLK_CONF {
206        &self.twai0_func_clk_conf
207    }
208    #[doc = "0x6c - I2S configuration register"]
209    #[inline(always)]
210    pub const fn i2s_conf(&self) -> &I2S_CONF {
211        &self.i2s_conf
212    }
213    #[doc = "0x70 - I2S_TX_CLKM configuration register"]
214    #[inline(always)]
215    pub const fn i2s_tx_clkm_conf(&self) -> &I2S_TX_CLKM_CONF {
216        &self.i2s_tx_clkm_conf
217    }
218    #[doc = "0x74 - I2S_TX_CLKM_DIV configuration register"]
219    #[inline(always)]
220    pub const fn i2s_tx_clkm_div_conf(&self) -> &I2S_TX_CLKM_DIV_CONF {
221        &self.i2s_tx_clkm_div_conf
222    }
223    #[doc = "0x78 - I2S_RX_CLKM configuration register"]
224    #[inline(always)]
225    pub const fn i2s_rx_clkm_conf(&self) -> &I2S_RX_CLKM_CONF {
226        &self.i2s_rx_clkm_conf
227    }
228    #[doc = "0x7c - I2S_RX_CLKM_DIV configuration register"]
229    #[inline(always)]
230    pub const fn i2s_rx_clkm_div_conf(&self) -> &I2S_RX_CLKM_DIV_CONF {
231        &self.i2s_rx_clkm_div_conf
232    }
233    #[doc = "0x80 - SARADC configuration register"]
234    #[inline(always)]
235    pub const fn saradc_conf(&self) -> &SARADC_CONF {
236        &self.saradc_conf
237    }
238    #[doc = "0x84 - SARADC_CLKM configuration register"]
239    #[inline(always)]
240    pub const fn saradc_clkm_conf(&self) -> &SARADC_CLKM_CONF {
241        &self.saradc_clkm_conf
242    }
243    #[doc = "0x88 - TSENS_CLK configuration register"]
244    #[inline(always)]
245    pub const fn tsens_clk_conf(&self) -> &TSENS_CLK_CONF {
246        &self.tsens_clk_conf
247    }
248    #[doc = "0x8c - USB_DEVICE configuration register"]
249    #[inline(always)]
250    pub const fn usb_device_conf(&self) -> &USB_DEVICE_CONF {
251        &self.usb_device_conf
252    }
253    #[doc = "0x90 - INTMTX configuration register"]
254    #[inline(always)]
255    pub const fn intmtx_conf(&self) -> &INTMTX_CONF {
256        &self.intmtx_conf
257    }
258    #[doc = "0x94 - PCNT configuration register"]
259    #[inline(always)]
260    pub const fn pcnt_conf(&self) -> &PCNT_CONF {
261        &self.pcnt_conf
262    }
263    #[doc = "0x98 - ETM configuration register"]
264    #[inline(always)]
265    pub const fn etm_conf(&self) -> &ETM_CONF {
266        &self.etm_conf
267    }
268    #[doc = "0x9c - PWM configuration register"]
269    #[inline(always)]
270    pub const fn pwm_conf(&self) -> &PWM_CONF {
271        &self.pwm_conf
272    }
273    #[doc = "0xa0 - PWM_CLK configuration register"]
274    #[inline(always)]
275    pub const fn pwm_clk_conf(&self) -> &PWM_CLK_CONF {
276        &self.pwm_clk_conf
277    }
278    #[doc = "0xa4 - PARL_IO configuration register"]
279    #[inline(always)]
280    pub const fn parl_io_conf(&self) -> &PARL_IO_CONF {
281        &self.parl_io_conf
282    }
283    #[doc = "0xa8 - PARL_CLK_RX configuration register"]
284    #[inline(always)]
285    pub const fn parl_clk_rx_conf(&self) -> &PARL_CLK_RX_CONF {
286        &self.parl_clk_rx_conf
287    }
288    #[doc = "0xac - PARL_CLK_TX configuration register"]
289    #[inline(always)]
290    pub const fn parl_clk_tx_conf(&self) -> &PARL_CLK_TX_CONF {
291        &self.parl_clk_tx_conf
292    }
293    #[doc = "0xb0 - PVT_MONITOR configuration register"]
294    #[inline(always)]
295    pub const fn pvt_monitor_conf(&self) -> &PVT_MONITOR_CONF {
296        &self.pvt_monitor_conf
297    }
298    #[doc = "0xb4 - PVT_MONITOR function clock configuration register"]
299    #[inline(always)]
300    pub const fn pvt_monitor_func_clk_conf(&self) -> &PVT_MONITOR_FUNC_CLK_CONF {
301        &self.pvt_monitor_func_clk_conf
302    }
303    #[doc = "0xb8 - GDMA configuration register"]
304    #[inline(always)]
305    pub const fn gdma_conf(&self) -> &GDMA_CONF {
306        &self.gdma_conf
307    }
308    #[doc = "0xbc - SPI2 configuration register"]
309    #[inline(always)]
310    pub const fn spi2_conf(&self) -> &SPI2_CONF {
311        &self.spi2_conf
312    }
313    #[doc = "0xc0 - SPI2_CLKM configuration register"]
314    #[inline(always)]
315    pub const fn spi2_clkm_conf(&self) -> &SPI2_CLKM_CONF {
316        &self.spi2_clkm_conf
317    }
318    #[doc = "0xc4 - AES configuration register"]
319    #[inline(always)]
320    pub const fn aes_conf(&self) -> &AES_CONF {
321        &self.aes_conf
322    }
323    #[doc = "0xc8 - SHA configuration register"]
324    #[inline(always)]
325    pub const fn sha_conf(&self) -> &SHA_CONF {
326        &self.sha_conf
327    }
328    #[doc = "0xcc - RSA configuration register"]
329    #[inline(always)]
330    pub const fn rsa_conf(&self) -> &RSA_CONF {
331        &self.rsa_conf
332    }
333    #[doc = "0xd0 - RSA power control register"]
334    #[inline(always)]
335    pub const fn rsa_pd_ctrl(&self) -> &RSA_PD_CTRL {
336        &self.rsa_pd_ctrl
337    }
338    #[doc = "0xd4 - ECC configuration register"]
339    #[inline(always)]
340    pub const fn ecc_conf(&self) -> &ECC_CONF {
341        &self.ecc_conf
342    }
343    #[doc = "0xd8 - ECC power control register"]
344    #[inline(always)]
345    pub const fn ecc_pd_ctrl(&self) -> &ECC_PD_CTRL {
346        &self.ecc_pd_ctrl
347    }
348    #[doc = "0xdc - DS configuration register"]
349    #[inline(always)]
350    pub const fn ds_conf(&self) -> &DS_CONF {
351        &self.ds_conf
352    }
353    #[doc = "0xe0 - HMAC configuration register"]
354    #[inline(always)]
355    pub const fn hmac_conf(&self) -> &HMAC_CONF {
356        &self.hmac_conf
357    }
358    #[doc = "0xe4 - ECDSA configuration register"]
359    #[inline(always)]
360    pub const fn ecdsa_conf(&self) -> &ECDSA_CONF {
361        &self.ecdsa_conf
362    }
363    #[doc = "0xe8 - IOMUX configuration register"]
364    #[inline(always)]
365    pub const fn iomux_conf(&self) -> &IOMUX_CONF {
366        &self.iomux_conf
367    }
368    #[doc = "0xec - IOMUX_CLK configuration register"]
369    #[inline(always)]
370    pub const fn iomux_clk_conf(&self) -> &IOMUX_CLK_CONF {
371        &self.iomux_clk_conf
372    }
373    #[doc = "0xf0 - MEM_MONITOR configuration register"]
374    #[inline(always)]
375    pub const fn mem_monitor_conf(&self) -> &MEM_MONITOR_CONF {
376        &self.mem_monitor_conf
377    }
378    #[doc = "0xf4 - REGDMA configuration register"]
379    #[inline(always)]
380    pub const fn regdma_conf(&self) -> &REGDMA_CONF {
381        &self.regdma_conf
382    }
383    #[doc = "0xf8 - TRACE configuration register"]
384    #[inline(always)]
385    pub const fn trace_conf(&self) -> &TRACE_CONF {
386        &self.trace_conf
387    }
388    #[doc = "0xfc - ASSIST configuration register"]
389    #[inline(always)]
390    pub const fn assist_conf(&self) -> &ASSIST_CONF {
391        &self.assist_conf
392    }
393    #[doc = "0x100 - CACHE configuration register"]
394    #[inline(always)]
395    pub const fn cache_conf(&self) -> &CACHE_CONF {
396        &self.cache_conf
397    }
398    #[doc = "0x104 - MODEM_APB configuration register"]
399    #[inline(always)]
400    pub const fn modem_conf(&self) -> &MODEM_CONF {
401        &self.modem_conf
402    }
403    #[doc = "0x108 - TIMEOUT configuration register"]
404    #[inline(always)]
405    pub const fn timeout_conf(&self) -> &TIMEOUT_CONF {
406        &self.timeout_conf
407    }
408    #[doc = "0x10c - SYSCLK configuration register"]
409    #[inline(always)]
410    pub const fn sysclk_conf(&self) -> &SYSCLK_CONF {
411        &self.sysclk_conf
412    }
413    #[doc = "0x110 - CPU_WAITI configuration register"]
414    #[inline(always)]
415    pub const fn cpu_waiti_conf(&self) -> &CPU_WAITI_CONF {
416        &self.cpu_waiti_conf
417    }
418    #[doc = "0x114 - CPU_FREQ configuration register"]
419    #[inline(always)]
420    pub const fn cpu_freq_conf(&self) -> &CPU_FREQ_CONF {
421        &self.cpu_freq_conf
422    }
423    #[doc = "0x118 - AHB_FREQ configuration register"]
424    #[inline(always)]
425    pub const fn ahb_freq_conf(&self) -> &AHB_FREQ_CONF {
426        &self.ahb_freq_conf
427    }
428    #[doc = "0x11c - APB_FREQ configuration register"]
429    #[inline(always)]
430    pub const fn apb_freq_conf(&self) -> &APB_FREQ_CONF {
431        &self.apb_freq_conf
432    }
433    #[doc = "0x120 - SYSCLK frequency query 0 register"]
434    #[inline(always)]
435    pub const fn sysclk_freq_query_0(&self) -> &SYSCLK_FREQ_QUERY_0 {
436        &self.sysclk_freq_query_0
437    }
438    #[doc = "0x124 - SPLL DIV clock-gating configuration register"]
439    #[inline(always)]
440    pub const fn pll_div_clk_en(&self) -> &PLL_DIV_CLK_EN {
441        &self.pll_div_clk_en
442    }
443    #[doc = "0x128 - CLK_OUT_EN configuration register"]
444    #[inline(always)]
445    pub const fn ctrl_clk_out_en(&self) -> &CTRL_CLK_OUT_EN {
446        &self.ctrl_clk_out_en
447    }
448    #[doc = "0x12c - TICK configuration register"]
449    #[inline(always)]
450    pub const fn ctrl_tick_conf(&self) -> &CTRL_TICK_CONF {
451        &self.ctrl_tick_conf
452    }
453    #[doc = "0x130 - 32KHz clock configuration register"]
454    #[inline(always)]
455    pub const fn ctrl_32k_conf(&self) -> &CTRL_32K_CONF {
456        &self.ctrl_32k_conf
457    }
458    #[doc = "0x134 - HP SRAM/ROM configuration register"]
459    #[inline(always)]
460    pub const fn sram_power_conf_0(&self) -> &SRAM_POWER_CONF_0 {
461        &self.sram_power_conf_0
462    }
463    #[doc = "0x138 - HP SRAM/ROM configuration register"]
464    #[inline(always)]
465    pub const fn sram_power_conf_1(&self) -> &SRAM_POWER_CONF_1 {
466        &self.sram_power_conf_1
467    }
468    #[doc = "0x13c - xxxx"]
469    #[inline(always)]
470    pub const fn sec_conf(&self) -> &SEC_CONF {
471        &self.sec_conf
472    }
473    #[doc = "0x140 - xxxx"]
474    #[inline(always)]
475    pub const fn adc_inv_phase_conf(&self) -> &ADC_INV_PHASE_CONF {
476        &self.adc_inv_phase_conf
477    }
478    #[doc = "0x144 - xxxx"]
479    #[inline(always)]
480    pub const fn sdm_inv_phase_conf(&self) -> &SDM_INV_PHASE_CONF {
481        &self.sdm_inv_phase_conf
482    }
483    #[doc = "0x148 - xxxx"]
484    #[inline(always)]
485    pub const fn bus_clk_update(&self) -> &BUS_CLK_UPDATE {
486        &self.bus_clk_update
487    }
488    #[doc = "0x14c - xxxx"]
489    #[inline(always)]
490    pub const fn sar_clk_div(&self) -> &SAR_CLK_DIV {
491        &self.sar_clk_div
492    }
493    #[doc = "0x150 - xxxx"]
494    #[inline(always)]
495    pub const fn pwdet_sar_clk_conf(&self) -> &PWDET_SAR_CLK_CONF {
496        &self.pwdet_sar_clk_conf
497    }
498    #[doc = "0xff0 - reset event bypass backdoor configuration register"]
499    #[inline(always)]
500    pub const fn reset_event_bypass(&self) -> &RESET_EVENT_BYPASS {
501        &self.reset_event_bypass
502    }
503    #[doc = "0xff4 - fpga debug register"]
504    #[inline(always)]
505    pub const fn fpga_debug(&self) -> &FPGA_DEBUG {
506        &self.fpga_debug
507    }
508    #[doc = "0xff8 - PCR clock gating configure register"]
509    #[inline(always)]
510    pub const fn clock_gate(&self) -> &CLOCK_GATE {
511        &self.clock_gate
512    }
513    #[doc = "0xffc - Date register."]
514    #[inline(always)]
515    pub const fn date(&self) -> &DATE {
516        &self.date
517    }
518}
519#[doc = "Cluster UART%s, containing UART?_CONF, UART?_SCLK_CONF, UART?_PD_CTRL"]
520pub use self::uart::UART;
521#[doc = r"Cluster"]
522#[doc = "Cluster UART%s, containing UART?_CONF, UART?_SCLK_CONF, UART?_PD_CTRL"]
523pub mod uart;
524#[doc = "MSPI_CONF (rw) register accessor: MSPI configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`mspi_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mspi_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspi_conf`] module"]
525pub type MSPI_CONF = crate::Reg<mspi_conf::MSPI_CONF_SPEC>;
526#[doc = "MSPI configuration register"]
527pub mod mspi_conf;
528#[doc = "MSPI_CLK_CONF (rw) register accessor: MSPI_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`mspi_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mspi_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mspi_clk_conf`] module"]
529pub type MSPI_CLK_CONF = crate::Reg<mspi_clk_conf::MSPI_CLK_CONF_SPEC>;
530#[doc = "MSPI_CLK configuration register"]
531pub mod mspi_clk_conf;
532#[doc = "I2C0_CONF (rw) register accessor: I2C configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_conf`] module"]
533pub type I2C0_CONF = crate::Reg<i2c0_conf::I2C0_CONF_SPEC>;
534#[doc = "I2C configuration register"]
535pub mod i2c0_conf;
536#[doc = "I2C0_SCLK_CONF (rw) register accessor: I2C_SCLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c0_sclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c0_sclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c0_sclk_conf`] module"]
537pub type I2C0_SCLK_CONF = crate::Reg<i2c0_sclk_conf::I2C0_SCLK_CONF_SPEC>;
538#[doc = "I2C_SCLK configuration register"]
539pub mod i2c0_sclk_conf;
540#[doc = "I2C1_CONF (rw) register accessor: I2C configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_conf`] module"]
541pub type I2C1_CONF = crate::Reg<i2c1_conf::I2C1_CONF_SPEC>;
542#[doc = "I2C configuration register"]
543pub mod i2c1_conf;
544#[doc = "I2C1_SCLK_CONF (rw) register accessor: I2C_SCLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2c1_sclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2c1_sclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2c1_sclk_conf`] module"]
545pub type I2C1_SCLK_CONF = crate::Reg<i2c1_sclk_conf::I2C1_SCLK_CONF_SPEC>;
546#[doc = "I2C_SCLK configuration register"]
547pub mod i2c1_sclk_conf;
548#[doc = "UHCI_CONF (rw) register accessor: UHCI configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`uhci_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`uhci_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@uhci_conf`] module"]
549pub type UHCI_CONF = crate::Reg<uhci_conf::UHCI_CONF_SPEC>;
550#[doc = "UHCI configuration register"]
551pub mod uhci_conf;
552#[doc = "RMT_CONF (rw) register accessor: RMT configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmt_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmt_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmt_conf`] module"]
553pub type RMT_CONF = crate::Reg<rmt_conf::RMT_CONF_SPEC>;
554#[doc = "RMT configuration register"]
555pub mod rmt_conf;
556#[doc = "RMT_SCLK_CONF (rw) register accessor: RMT_SCLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rmt_sclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rmt_sclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rmt_sclk_conf`] module"]
557pub type RMT_SCLK_CONF = crate::Reg<rmt_sclk_conf::RMT_SCLK_CONF_SPEC>;
558#[doc = "RMT_SCLK configuration register"]
559pub mod rmt_sclk_conf;
560#[doc = "LEDC_CONF (rw) register accessor: LEDC configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ledc_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ledc_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ledc_conf`] module"]
561pub type LEDC_CONF = crate::Reg<ledc_conf::LEDC_CONF_SPEC>;
562#[doc = "LEDC configuration register"]
563pub mod ledc_conf;
564#[doc = "LEDC_SCLK_CONF (rw) register accessor: LEDC_SCLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ledc_sclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ledc_sclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ledc_sclk_conf`] module"]
565pub type LEDC_SCLK_CONF = crate::Reg<ledc_sclk_conf::LEDC_SCLK_CONF_SPEC>;
566#[doc = "LEDC_SCLK configuration register"]
567pub mod ledc_sclk_conf;
568#[doc = "TIMERGROUP0_CONF (rw) register accessor: TIMERGROUP0 configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup0_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup0_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup0_conf`] module"]
569pub type TIMERGROUP0_CONF = crate::Reg<timergroup0_conf::TIMERGROUP0_CONF_SPEC>;
570#[doc = "TIMERGROUP0 configuration register"]
571pub mod timergroup0_conf;
572#[doc = "TIMERGROUP0_TIMER_CLK_CONF (rw) register accessor: TIMERGROUP0_TIMER_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup0_timer_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup0_timer_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup0_timer_clk_conf`] module"]
573pub type TIMERGROUP0_TIMER_CLK_CONF =
574    crate::Reg<timergroup0_timer_clk_conf::TIMERGROUP0_TIMER_CLK_CONF_SPEC>;
575#[doc = "TIMERGROUP0_TIMER_CLK configuration register"]
576pub mod timergroup0_timer_clk_conf;
577#[doc = "TIMERGROUP0_WDT_CLK_CONF (rw) register accessor: TIMERGROUP0_WDT_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup0_wdt_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup0_wdt_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup0_wdt_clk_conf`] module"]
578pub type TIMERGROUP0_WDT_CLK_CONF =
579    crate::Reg<timergroup0_wdt_clk_conf::TIMERGROUP0_WDT_CLK_CONF_SPEC>;
580#[doc = "TIMERGROUP0_WDT_CLK configuration register"]
581pub mod timergroup0_wdt_clk_conf;
582#[doc = "TIMERGROUP1_CONF (rw) register accessor: TIMERGROUP1 configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup1_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup1_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup1_conf`] module"]
583pub type TIMERGROUP1_CONF = crate::Reg<timergroup1_conf::TIMERGROUP1_CONF_SPEC>;
584#[doc = "TIMERGROUP1 configuration register"]
585pub mod timergroup1_conf;
586#[doc = "TIMERGROUP1_TIMER_CLK_CONF (rw) register accessor: TIMERGROUP1_TIMER_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup1_timer_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup1_timer_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup1_timer_clk_conf`] module"]
587pub type TIMERGROUP1_TIMER_CLK_CONF =
588    crate::Reg<timergroup1_timer_clk_conf::TIMERGROUP1_TIMER_CLK_CONF_SPEC>;
589#[doc = "TIMERGROUP1_TIMER_CLK configuration register"]
590pub mod timergroup1_timer_clk_conf;
591#[doc = "TIMERGROUP1_WDT_CLK_CONF (rw) register accessor: TIMERGROUP1_WDT_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timergroup1_wdt_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timergroup1_wdt_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timergroup1_wdt_clk_conf`] module"]
592pub type TIMERGROUP1_WDT_CLK_CONF =
593    crate::Reg<timergroup1_wdt_clk_conf::TIMERGROUP1_WDT_CLK_CONF_SPEC>;
594#[doc = "TIMERGROUP1_WDT_CLK configuration register"]
595pub mod timergroup1_wdt_clk_conf;
596#[doc = "SYSTIMER_CONF (rw) register accessor: SYSTIMER configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_conf`] module"]
597pub type SYSTIMER_CONF = crate::Reg<systimer_conf::SYSTIMER_CONF_SPEC>;
598#[doc = "SYSTIMER configuration register"]
599pub mod systimer_conf;
600#[doc = "SYSTIMER_FUNC_CLK_CONF (rw) register accessor: SYSTIMER_FUNC_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`systimer_func_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`systimer_func_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@systimer_func_clk_conf`] module"]
601pub type SYSTIMER_FUNC_CLK_CONF = crate::Reg<systimer_func_clk_conf::SYSTIMER_FUNC_CLK_CONF_SPEC>;
602#[doc = "SYSTIMER_FUNC_CLK configuration register"]
603pub mod systimer_func_clk_conf;
604#[doc = "TWAI0_CONF (rw) register accessor: TWAI0 configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`twai0_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`twai0_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@twai0_conf`] module"]
605pub type TWAI0_CONF = crate::Reg<twai0_conf::TWAI0_CONF_SPEC>;
606#[doc = "TWAI0 configuration register"]
607pub mod twai0_conf;
608#[doc = "TWAI0_FUNC_CLK_CONF (rw) register accessor: TWAI0_FUNC_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`twai0_func_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`twai0_func_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@twai0_func_clk_conf`] module"]
609pub type TWAI0_FUNC_CLK_CONF = crate::Reg<twai0_func_clk_conf::TWAI0_FUNC_CLK_CONF_SPEC>;
610#[doc = "TWAI0_FUNC_CLK configuration register"]
611pub mod twai0_func_clk_conf;
612#[doc = "I2S_CONF (rw) register accessor: I2S configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s_conf`] module"]
613pub type I2S_CONF = crate::Reg<i2s_conf::I2S_CONF_SPEC>;
614#[doc = "I2S configuration register"]
615pub mod i2s_conf;
616#[doc = "I2S_TX_CLKM_CONF (rw) register accessor: I2S_TX_CLKM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s_tx_clkm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s_tx_clkm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s_tx_clkm_conf`] module"]
617pub type I2S_TX_CLKM_CONF = crate::Reg<i2s_tx_clkm_conf::I2S_TX_CLKM_CONF_SPEC>;
618#[doc = "I2S_TX_CLKM configuration register"]
619pub mod i2s_tx_clkm_conf;
620#[doc = "I2S_TX_CLKM_DIV_CONF (rw) register accessor: I2S_TX_CLKM_DIV configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s_tx_clkm_div_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s_tx_clkm_div_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s_tx_clkm_div_conf`] module"]
621pub type I2S_TX_CLKM_DIV_CONF = crate::Reg<i2s_tx_clkm_div_conf::I2S_TX_CLKM_DIV_CONF_SPEC>;
622#[doc = "I2S_TX_CLKM_DIV configuration register"]
623pub mod i2s_tx_clkm_div_conf;
624#[doc = "I2S_RX_CLKM_CONF (rw) register accessor: I2S_RX_CLKM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s_rx_clkm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s_rx_clkm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s_rx_clkm_conf`] module"]
625pub type I2S_RX_CLKM_CONF = crate::Reg<i2s_rx_clkm_conf::I2S_RX_CLKM_CONF_SPEC>;
626#[doc = "I2S_RX_CLKM configuration register"]
627pub mod i2s_rx_clkm_conf;
628#[doc = "I2S_RX_CLKM_DIV_CONF (rw) register accessor: I2S_RX_CLKM_DIV configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`i2s_rx_clkm_div_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`i2s_rx_clkm_div_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@i2s_rx_clkm_div_conf`] module"]
629pub type I2S_RX_CLKM_DIV_CONF = crate::Reg<i2s_rx_clkm_div_conf::I2S_RX_CLKM_DIV_CONF_SPEC>;
630#[doc = "I2S_RX_CLKM_DIV configuration register"]
631pub mod i2s_rx_clkm_div_conf;
632#[doc = "SARADC_CONF (rw) register accessor: SARADC configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`saradc_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saradc_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saradc_conf`] module"]
633pub type SARADC_CONF = crate::Reg<saradc_conf::SARADC_CONF_SPEC>;
634#[doc = "SARADC configuration register"]
635pub mod saradc_conf;
636#[doc = "SARADC_CLKM_CONF (rw) register accessor: SARADC_CLKM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`saradc_clkm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`saradc_clkm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@saradc_clkm_conf`] module"]
637pub type SARADC_CLKM_CONF = crate::Reg<saradc_clkm_conf::SARADC_CLKM_CONF_SPEC>;
638#[doc = "SARADC_CLKM configuration register"]
639pub mod saradc_clkm_conf;
640#[doc = "TSENS_CLK_CONF (rw) register accessor: TSENS_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`tsens_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsens_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@tsens_clk_conf`] module"]
641pub type TSENS_CLK_CONF = crate::Reg<tsens_clk_conf::TSENS_CLK_CONF_SPEC>;
642#[doc = "TSENS_CLK configuration register"]
643pub mod tsens_clk_conf;
644#[doc = "USB_DEVICE_CONF (rw) register accessor: USB_DEVICE configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`usb_device_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`usb_device_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@usb_device_conf`] module"]
645pub type USB_DEVICE_CONF = crate::Reg<usb_device_conf::USB_DEVICE_CONF_SPEC>;
646#[doc = "USB_DEVICE configuration register"]
647pub mod usb_device_conf;
648#[doc = "INTMTX_CONF (rw) register accessor: INTMTX configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`intmtx_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`intmtx_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@intmtx_conf`] module"]
649pub type INTMTX_CONF = crate::Reg<intmtx_conf::INTMTX_CONF_SPEC>;
650#[doc = "INTMTX configuration register"]
651pub mod intmtx_conf;
652#[doc = "PCNT_CONF (rw) register accessor: PCNT configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pcnt_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pcnt_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pcnt_conf`] module"]
653pub type PCNT_CONF = crate::Reg<pcnt_conf::PCNT_CONF_SPEC>;
654#[doc = "PCNT configuration register"]
655pub mod pcnt_conf;
656#[doc = "ETM_CONF (rw) register accessor: ETM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`etm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`etm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@etm_conf`] module"]
657pub type ETM_CONF = crate::Reg<etm_conf::ETM_CONF_SPEC>;
658#[doc = "ETM configuration register"]
659pub mod etm_conf;
660#[doc = "PWM_CONF (rw) register accessor: PWM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_conf`] module"]
661pub type PWM_CONF = crate::Reg<pwm_conf::PWM_CONF_SPEC>;
662#[doc = "PWM configuration register"]
663pub mod pwm_conf;
664#[doc = "PWM_CLK_CONF (rw) register accessor: PWM_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pwm_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwm_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwm_clk_conf`] module"]
665pub type PWM_CLK_CONF = crate::Reg<pwm_clk_conf::PWM_CLK_CONF_SPEC>;
666#[doc = "PWM_CLK configuration register"]
667pub mod pwm_clk_conf;
668#[doc = "PARL_IO_CONF (rw) register accessor: PARL_IO configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`parl_io_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`parl_io_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@parl_io_conf`] module"]
669pub type PARL_IO_CONF = crate::Reg<parl_io_conf::PARL_IO_CONF_SPEC>;
670#[doc = "PARL_IO configuration register"]
671pub mod parl_io_conf;
672#[doc = "PARL_CLK_RX_CONF (rw) register accessor: PARL_CLK_RX configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`parl_clk_rx_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`parl_clk_rx_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@parl_clk_rx_conf`] module"]
673pub type PARL_CLK_RX_CONF = crate::Reg<parl_clk_rx_conf::PARL_CLK_RX_CONF_SPEC>;
674#[doc = "PARL_CLK_RX configuration register"]
675pub mod parl_clk_rx_conf;
676#[doc = "PARL_CLK_TX_CONF (rw) register accessor: PARL_CLK_TX configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`parl_clk_tx_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`parl_clk_tx_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@parl_clk_tx_conf`] module"]
677pub type PARL_CLK_TX_CONF = crate::Reg<parl_clk_tx_conf::PARL_CLK_TX_CONF_SPEC>;
678#[doc = "PARL_CLK_TX configuration register"]
679pub mod parl_clk_tx_conf;
680#[doc = "PVT_MONITOR_CONF (rw) register accessor: PVT_MONITOR configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pvt_monitor_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pvt_monitor_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pvt_monitor_conf`] module"]
681pub type PVT_MONITOR_CONF = crate::Reg<pvt_monitor_conf::PVT_MONITOR_CONF_SPEC>;
682#[doc = "PVT_MONITOR configuration register"]
683pub mod pvt_monitor_conf;
684#[doc = "PVT_MONITOR_FUNC_CLK_CONF (rw) register accessor: PVT_MONITOR function clock configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pvt_monitor_func_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pvt_monitor_func_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pvt_monitor_func_clk_conf`] module"]
685pub type PVT_MONITOR_FUNC_CLK_CONF =
686    crate::Reg<pvt_monitor_func_clk_conf::PVT_MONITOR_FUNC_CLK_CONF_SPEC>;
687#[doc = "PVT_MONITOR function clock configuration register"]
688pub mod pvt_monitor_func_clk_conf;
689#[doc = "GDMA_CONF (rw) register accessor: GDMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`gdma_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`gdma_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@gdma_conf`] module"]
690pub type GDMA_CONF = crate::Reg<gdma_conf::GDMA_CONF_SPEC>;
691#[doc = "GDMA configuration register"]
692pub mod gdma_conf;
693#[doc = "SPI2_CONF (rw) register accessor: SPI2 configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi2_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi2_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi2_conf`] module"]
694pub type SPI2_CONF = crate::Reg<spi2_conf::SPI2_CONF_SPEC>;
695#[doc = "SPI2 configuration register"]
696pub mod spi2_conf;
697#[doc = "SPI2_CLKM_CONF (rw) register accessor: SPI2_CLKM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`spi2_clkm_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`spi2_clkm_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@spi2_clkm_conf`] module"]
698pub type SPI2_CLKM_CONF = crate::Reg<spi2_clkm_conf::SPI2_CLKM_CONF_SPEC>;
699#[doc = "SPI2_CLKM configuration register"]
700pub mod spi2_clkm_conf;
701#[doc = "AES_CONF (rw) register accessor: AES configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`aes_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`aes_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@aes_conf`] module"]
702pub type AES_CONF = crate::Reg<aes_conf::AES_CONF_SPEC>;
703#[doc = "AES configuration register"]
704pub mod aes_conf;
705#[doc = "SHA_CONF (rw) register accessor: SHA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sha_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sha_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sha_conf`] module"]
706pub type SHA_CONF = crate::Reg<sha_conf::SHA_CONF_SPEC>;
707#[doc = "SHA configuration register"]
708pub mod sha_conf;
709#[doc = "RSA_CONF (rw) register accessor: RSA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`rsa_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rsa_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsa_conf`] module"]
710pub type RSA_CONF = crate::Reg<rsa_conf::RSA_CONF_SPEC>;
711#[doc = "RSA configuration register"]
712pub mod rsa_conf;
713#[doc = "RSA_PD_CTRL (rw) register accessor: RSA power control register\n\nYou can [`read`](crate::Reg::read) this register and get [`rsa_pd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`rsa_pd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@rsa_pd_ctrl`] module"]
714pub type RSA_PD_CTRL = crate::Reg<rsa_pd_ctrl::RSA_PD_CTRL_SPEC>;
715#[doc = "RSA power control register"]
716pub mod rsa_pd_ctrl;
717#[doc = "ECC_CONF (rw) register accessor: ECC configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ecc_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ecc_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecc_conf`] module"]
718pub type ECC_CONF = crate::Reg<ecc_conf::ECC_CONF_SPEC>;
719#[doc = "ECC configuration register"]
720pub mod ecc_conf;
721#[doc = "ECC_PD_CTRL (rw) register accessor: ECC power control register\n\nYou can [`read`](crate::Reg::read) this register and get [`ecc_pd_ctrl::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ecc_pd_ctrl::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecc_pd_ctrl`] module"]
722pub type ECC_PD_CTRL = crate::Reg<ecc_pd_ctrl::ECC_PD_CTRL_SPEC>;
723#[doc = "ECC power control register"]
724pub mod ecc_pd_ctrl;
725#[doc = "DS_CONF (rw) register accessor: DS configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ds_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ds_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ds_conf`] module"]
726pub type DS_CONF = crate::Reg<ds_conf::DS_CONF_SPEC>;
727#[doc = "DS configuration register"]
728pub mod ds_conf;
729#[doc = "HMAC_CONF (rw) register accessor: HMAC configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`hmac_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hmac_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@hmac_conf`] module"]
730pub type HMAC_CONF = crate::Reg<hmac_conf::HMAC_CONF_SPEC>;
731#[doc = "HMAC configuration register"]
732pub mod hmac_conf;
733#[doc = "ECDSA_CONF (rw) register accessor: ECDSA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ecdsa_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ecdsa_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ecdsa_conf`] module"]
734pub type ECDSA_CONF = crate::Reg<ecdsa_conf::ECDSA_CONF_SPEC>;
735#[doc = "ECDSA configuration register"]
736pub mod ecdsa_conf;
737#[doc = "IOMUX_CONF (rw) register accessor: IOMUX configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`iomux_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iomux_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iomux_conf`] module"]
738pub type IOMUX_CONF = crate::Reg<iomux_conf::IOMUX_CONF_SPEC>;
739#[doc = "IOMUX configuration register"]
740pub mod iomux_conf;
741#[doc = "IOMUX_CLK_CONF (rw) register accessor: IOMUX_CLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`iomux_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`iomux_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@iomux_clk_conf`] module"]
742pub type IOMUX_CLK_CONF = crate::Reg<iomux_clk_conf::IOMUX_CLK_CONF_SPEC>;
743#[doc = "IOMUX_CLK configuration register"]
744pub mod iomux_clk_conf;
745#[doc = "MEM_MONITOR_CONF (rw) register accessor: MEM_MONITOR configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_monitor_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_monitor_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_monitor_conf`] module"]
746pub type MEM_MONITOR_CONF = crate::Reg<mem_monitor_conf::MEM_MONITOR_CONF_SPEC>;
747#[doc = "MEM_MONITOR configuration register"]
748pub mod mem_monitor_conf;
749#[doc = "REGDMA_CONF (rw) register accessor: REGDMA configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`regdma_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`regdma_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@regdma_conf`] module"]
750pub type REGDMA_CONF = crate::Reg<regdma_conf::REGDMA_CONF_SPEC>;
751#[doc = "REGDMA configuration register"]
752pub mod regdma_conf;
753#[doc = "TRACE_CONF (rw) register accessor: TRACE configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`trace_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trace_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@trace_conf`] module"]
754pub type TRACE_CONF = crate::Reg<trace_conf::TRACE_CONF_SPEC>;
755#[doc = "TRACE configuration register"]
756pub mod trace_conf;
757#[doc = "ASSIST_CONF (rw) register accessor: ASSIST configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`assist_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`assist_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@assist_conf`] module"]
758pub type ASSIST_CONF = crate::Reg<assist_conf::ASSIST_CONF_SPEC>;
759#[doc = "ASSIST configuration register"]
760pub mod assist_conf;
761#[doc = "CACHE_CONF (rw) register accessor: CACHE configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cache_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cache_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cache_conf`] module"]
762pub type CACHE_CONF = crate::Reg<cache_conf::CACHE_CONF_SPEC>;
763#[doc = "CACHE configuration register"]
764pub mod cache_conf;
765#[doc = "MODEM_CONF (rw) register accessor: MODEM_APB configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`modem_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`modem_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@modem_conf`] module"]
766pub type MODEM_CONF = crate::Reg<modem_conf::MODEM_CONF_SPEC>;
767#[doc = "MODEM_APB configuration register"]
768pub mod modem_conf;
769#[doc = "TIMEOUT_CONF (rw) register accessor: TIMEOUT configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`timeout_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`timeout_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@timeout_conf`] module"]
770pub type TIMEOUT_CONF = crate::Reg<timeout_conf::TIMEOUT_CONF_SPEC>;
771#[doc = "TIMEOUT configuration register"]
772pub mod timeout_conf;
773#[doc = "SYSCLK_CONF (rw) register accessor: SYSCLK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sysclk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclk_conf`] module"]
774pub type SYSCLK_CONF = crate::Reg<sysclk_conf::SYSCLK_CONF_SPEC>;
775#[doc = "SYSCLK configuration register"]
776pub mod sysclk_conf;
777#[doc = "CPU_WAITI_CONF (rw) register accessor: CPU_WAITI configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_waiti_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_waiti_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_waiti_conf`] module"]
778pub type CPU_WAITI_CONF = crate::Reg<cpu_waiti_conf::CPU_WAITI_CONF_SPEC>;
779#[doc = "CPU_WAITI configuration register"]
780pub mod cpu_waiti_conf;
781#[doc = "CPU_FREQ_CONF (rw) register accessor: CPU_FREQ configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`cpu_freq_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`cpu_freq_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@cpu_freq_conf`] module"]
782pub type CPU_FREQ_CONF = crate::Reg<cpu_freq_conf::CPU_FREQ_CONF_SPEC>;
783#[doc = "CPU_FREQ configuration register"]
784pub mod cpu_freq_conf;
785#[doc = "AHB_FREQ_CONF (rw) register accessor: AHB_FREQ configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ahb_freq_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ahb_freq_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ahb_freq_conf`] module"]
786pub type AHB_FREQ_CONF = crate::Reg<ahb_freq_conf::AHB_FREQ_CONF_SPEC>;
787#[doc = "AHB_FREQ configuration register"]
788pub mod ahb_freq_conf;
789#[doc = "APB_FREQ_CONF (rw) register accessor: APB_FREQ configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`apb_freq_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`apb_freq_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@apb_freq_conf`] module"]
790pub type APB_FREQ_CONF = crate::Reg<apb_freq_conf::APB_FREQ_CONF_SPEC>;
791#[doc = "APB_FREQ configuration register"]
792pub mod apb_freq_conf;
793#[doc = "SYSCLK_FREQ_QUERY_0 (r) register accessor: SYSCLK frequency query 0 register\n\nYou can [`read`](crate::Reg::read) this register and get [`sysclk_freq_query_0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sysclk_freq_query_0`] module"]
794pub type SYSCLK_FREQ_QUERY_0 = crate::Reg<sysclk_freq_query_0::SYSCLK_FREQ_QUERY_0_SPEC>;
795#[doc = "SYSCLK frequency query 0 register"]
796pub mod sysclk_freq_query_0;
797#[doc = "PLL_DIV_CLK_EN (rw) register accessor: SPLL DIV clock-gating configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`pll_div_clk_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pll_div_clk_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pll_div_clk_en`] module"]
798pub type PLL_DIV_CLK_EN = crate::Reg<pll_div_clk_en::PLL_DIV_CLK_EN_SPEC>;
799#[doc = "SPLL DIV clock-gating configuration register"]
800pub mod pll_div_clk_en;
801#[doc = "CTRL_CLK_OUT_EN (rw) register accessor: CLK_OUT_EN configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_clk_out_en::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_clk_out_en::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_clk_out_en`] module"]
802pub type CTRL_CLK_OUT_EN = crate::Reg<ctrl_clk_out_en::CTRL_CLK_OUT_EN_SPEC>;
803#[doc = "CLK_OUT_EN configuration register"]
804pub mod ctrl_clk_out_en;
805#[doc = "CTRL_TICK_CONF (rw) register accessor: TICK configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_tick_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_tick_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_tick_conf`] module"]
806pub type CTRL_TICK_CONF = crate::Reg<ctrl_tick_conf::CTRL_TICK_CONF_SPEC>;
807#[doc = "TICK configuration register"]
808pub mod ctrl_tick_conf;
809#[doc = "CTRL_32K_CONF (rw) register accessor: 32KHz clock configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`ctrl_32k_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ctrl_32k_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ctrl_32k_conf`] module"]
810pub type CTRL_32K_CONF = crate::Reg<ctrl_32k_conf::CTRL_32K_CONF_SPEC>;
811#[doc = "32KHz clock configuration register"]
812pub mod ctrl_32k_conf;
813#[doc = "SRAM_POWER_CONF_0 (rw) register accessor: HP SRAM/ROM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sram_power_conf_0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_power_conf_0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_power_conf_0`] module"]
814pub type SRAM_POWER_CONF_0 = crate::Reg<sram_power_conf_0::SRAM_POWER_CONF_0_SPEC>;
815#[doc = "HP SRAM/ROM configuration register"]
816pub mod sram_power_conf_0;
817#[doc = "SRAM_POWER_CONF_1 (rw) register accessor: HP SRAM/ROM configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`sram_power_conf_1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sram_power_conf_1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sram_power_conf_1`] module"]
818pub type SRAM_POWER_CONF_1 = crate::Reg<sram_power_conf_1::SRAM_POWER_CONF_1_SPEC>;
819#[doc = "HP SRAM/ROM configuration register"]
820pub mod sram_power_conf_1;
821#[doc = "SEC_CONF (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`sec_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sec_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sec_conf`] module"]
822pub type SEC_CONF = crate::Reg<sec_conf::SEC_CONF_SPEC>;
823#[doc = "xxxx"]
824pub mod sec_conf;
825#[doc = "ADC_INV_PHASE_CONF (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`adc_inv_phase_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`adc_inv_phase_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@adc_inv_phase_conf`] module"]
826pub type ADC_INV_PHASE_CONF = crate::Reg<adc_inv_phase_conf::ADC_INV_PHASE_CONF_SPEC>;
827#[doc = "xxxx"]
828pub mod adc_inv_phase_conf;
829#[doc = "SDM_INV_PHASE_CONF (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`sdm_inv_phase_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sdm_inv_phase_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sdm_inv_phase_conf`] module"]
830pub type SDM_INV_PHASE_CONF = crate::Reg<sdm_inv_phase_conf::SDM_INV_PHASE_CONF_SPEC>;
831#[doc = "xxxx"]
832pub mod sdm_inv_phase_conf;
833#[doc = "BUS_CLK_UPDATE (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`bus_clk_update::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`bus_clk_update::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_clk_update`] module"]
834pub type BUS_CLK_UPDATE = crate::Reg<bus_clk_update::BUS_CLK_UPDATE_SPEC>;
835#[doc = "xxxx"]
836pub mod bus_clk_update;
837#[doc = "SAR_CLK_DIV (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`sar_clk_div::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`sar_clk_div::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@sar_clk_div`] module"]
838pub type SAR_CLK_DIV = crate::Reg<sar_clk_div::SAR_CLK_DIV_SPEC>;
839#[doc = "xxxx"]
840pub mod sar_clk_div;
841#[doc = "PWDET_SAR_CLK_CONF (rw) register accessor: xxxx\n\nYou can [`read`](crate::Reg::read) this register and get [`pwdet_sar_clk_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`pwdet_sar_clk_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@pwdet_sar_clk_conf`] module"]
842pub type PWDET_SAR_CLK_CONF = crate::Reg<pwdet_sar_clk_conf::PWDET_SAR_CLK_CONF_SPEC>;
843#[doc = "xxxx"]
844pub mod pwdet_sar_clk_conf;
845#[doc = "RESET_EVENT_BYPASS (rw) register accessor: reset event bypass backdoor configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`reset_event_bypass::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`reset_event_bypass::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@reset_event_bypass`] module"]
846pub type RESET_EVENT_BYPASS = crate::Reg<reset_event_bypass::RESET_EVENT_BYPASS_SPEC>;
847#[doc = "reset event bypass backdoor configuration register"]
848pub mod reset_event_bypass;
849#[doc = "FPGA_DEBUG (rw) register accessor: fpga debug register\n\nYou can [`read`](crate::Reg::read) this register and get [`fpga_debug::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`fpga_debug::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fpga_debug`] module"]
850pub type FPGA_DEBUG = crate::Reg<fpga_debug::FPGA_DEBUG_SPEC>;
851#[doc = "fpga debug register"]
852pub mod fpga_debug;
853#[doc = "CLOCK_GATE (rw) register accessor: PCR clock gating configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`clock_gate::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`clock_gate::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clock_gate`] module"]
854pub type CLOCK_GATE = crate::Reg<clock_gate::CLOCK_GATE_SPEC>;
855#[doc = "PCR clock gating configure register"]
856pub mod clock_gate;
857#[doc = "DATE (rw) register accessor: Date register.\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
858pub type DATE = crate::Reg<date::DATE_SPEC>;
859#[doc = "Date register."]
860pub mod date;
esp32h2/pcr.rs

esp32h2/
pcr.rs
