Module tx_genrl_cfg

Source
Expand description

Parallel TX general configuration register.

Structs§

TX_GENRL_CFG_SPEC
Parallel TX general configuration register.

Type Aliases§

R
Register TX_GENRL_CFG reader
TX_GATING_EN_R
Field TX_GATING_EN reader - Set this bit to enable the clock gating of output tx clock.
TX_GATING_EN_W
Field TX_GATING_EN writer - Set this bit to enable the clock gating of output tx clock.
TX_IDLE_VALUE_R
Field TX_IDLE_VALUE reader - Configures bus value of transmitter in IDLE state.
TX_IDLE_VALUE_W
Field TX_IDLE_VALUE writer - Configures bus value of transmitter in IDLE state.
TX_VALID_OUTPUT_EN_R
Field TX_VALID_OUTPUT_EN reader - Set this bit to enable the output of tx data valid signal.
TX_VALID_OUTPUT_EN_W
Field TX_VALID_OUTPUT_EN writer - Set this bit to enable the output of tx data valid signal.
W
Register TX_GENRL_CFG writer