Module esp32h2::uart0::clk_conf

UART core clock configuration

Structs

• CLK_CONF_SPEC
  UART core clock configuration

Type Aliases

• R
  Register CLK_CONF reader
• RST_CORE_R
  Field RST_CORE reader - Write 1 then write 0 to this bit to reset UART Rx.
• RST_CORE_W
  Field RST_CORE writer - Write 1 then write 0 to this bit to reset UART Rx.
• SCLK_EN_R
  Field SCLK_EN reader - Set this bit to enable UART Rx clock.
• SCLK_EN_W
  Field SCLK_EN writer - Set this bit to enable UART Rx clock.
• TX_RST_CORE_R
  Field TX_RST_CORE reader - Write 1 then write 0 to this bit to reset UART Tx.
• TX_RST_CORE_W
  Field TX_RST_CORE writer - Write 1 then write 0 to this bit to reset UART Tx.
• TX_SCLK_EN_R
  Field TX_SCLK_EN reader - Set this bit to enable UART Tx clock.
• TX_SCLK_EN_W
  Field TX_SCLK_EN writer - Set this bit to enable UART Tx clock.
• W
  Register CLK_CONF writer