Module esp32h2::spi0::axi_err_addr

SPI0 AXI request error address.

Structs

• AXI_ERR_ADDR_SPEC
  SPI0 AXI request error address.

Type Aliases

• ALL_FIFO_EMPTY_R
  Field ALL_FIFO_EMPTY reader - The empty status of all AFIFO and SYNC_FIFO in MSPI module. 1: All AXI transfers and SPI0 transfers are done. 0: Others.
• AXI_ERR_ADDR_R
  Field AXI_ERR_ADDR reader - This bits show the first AXI write/read invalid error or AXI write flash error address. It is cleared by when SPI_MEM_AXI_WADDR_ERR_INT_CLR, SPI_MEM_AXI_WR_FLASH_ERR_IN_CLR or SPI_MEM_AXI_RADDR_ERR_IN_CLR bit is set.
• R
  Register AXI_ERR_ADDR reader
• SPI_ALL_AXI_TRANS_AFIFO_EMPTY_R
  Field SPI_ALL_AXI_TRANS_AFIFO_EMPTY reader - This bit is set when WADDR_AFIFO, WBLEN_AFIFO, WDATA_AFIFO, AXI_RADDR_CTL_AFIFO and RDATA_AFIFO are empty and spi0_mst_st is IDLE.
• SPI_RADDR_AFIFO_REMPTY_R
  Field SPI_RADDR_AFIFO_REMPTY reader - 1: AXI_RADDR_CTL_AFIFO is empty. 0: At least one AXI read transfer is pending.
• SPI_RDATA_AFIFO_REMPTY_R
  Field SPI_RDATA_AFIFO_REMPTY reader - 1: RDATA_AFIFO is empty. 0: At least one AXI read transfer is pending.
• SPI_WBLEN_AFIFO_REMPTY_R
  Field SPI_WBLEN_AFIFO_REMPTY reader - 1: WBLEN_AFIFO is empty. 0: At least one AXI write transfer is pending.
• SPI_WDATA_AFIFO_REMPTY_R
  Field SPI_WDATA_AFIFO_REMPTY reader - 1: WDATA_AFIFO is empty. 0: At least one AXI write transfer is pending.