Module esp32h2::spi1::spi_mem_int_raw

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SPI1 interrupt raw register

Structs§

Type Aliases§

  • R
    Register SPI_MEM_INT_RAW reader
  • SPI_MEM_BROWN_OUT_INT_RAW_R
    Field SPI_MEM_BROWN_OUT_INT_RAW reader - The raw bit for SPI_MEM_BROWN_OUT_INT interrupt. 1: Triggered condition is that chip is loosing power and RTC module sends out brown out close flash request to SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered and MSPI returns to idle state. 0: Others.
  • SPI_MEM_BROWN_OUT_INT_RAW_W
    Field SPI_MEM_BROWN_OUT_INT_RAW writer - The raw bit for SPI_MEM_BROWN_OUT_INT interrupt. 1: Triggered condition is that chip is loosing power and RTC module sends out brown out close flash request to SPI1. After SPI1 sends out suspend command to flash, this interrupt is triggered and MSPI returns to idle state. 0: Others.
  • SPI_MEM_MST_ST_END_INT_RAW_R
    Field SPI_MEM_MST_ST_END_INT_RAW reader - The raw bit for SPI_MEM_MST_ST_END_INT interrupt. 1: Triggered when spi1_mst_st is changed from non idle state to idle state. 0: Others.
  • SPI_MEM_MST_ST_END_INT_RAW_W
    Field SPI_MEM_MST_ST_END_INT_RAW writer - The raw bit for SPI_MEM_MST_ST_END_INT interrupt. 1: Triggered when spi1_mst_st is changed from non idle state to idle state. 0: Others.
  • SPI_MEM_PER_END_INT_RAW_R
    Field SPI_MEM_PER_END_INT_RAW reader - The raw bit for SPI_MEM_PER_END_INT interrupt. 1: Triggered when Auto Resume command (0x7A) is sent and flash is resumed successfully. 0: Others.
  • SPI_MEM_PER_END_INT_RAW_W
    Field SPI_MEM_PER_END_INT_RAW writer - The raw bit for SPI_MEM_PER_END_INT interrupt. 1: Triggered when Auto Resume command (0x7A) is sent and flash is resumed successfully. 0: Others.
  • SPI_MEM_PES_END_INT_RAW_R
    Field SPI_MEM_PES_END_INT_RAW reader - The raw bit for SPI_MEM_PES_END_INT interrupt.1: Triggered when Auto Suspend command (0x75) is sent and flash is suspended successfully. 0: Others.
  • SPI_MEM_PES_END_INT_RAW_W
    Field SPI_MEM_PES_END_INT_RAW writer - The raw bit for SPI_MEM_PES_END_INT interrupt.1: Triggered when Auto Suspend command (0x75) is sent and flash is suspended successfully. 0: Others.
  • SPI_MEM_SLV_ST_END_INT_RAW_R
    Field SPI_MEM_SLV_ST_END_INT_RAW reader - The raw bit for SPI_MEM_SLV_ST_END_INT interrupt. 1: Triggered when spi1_slv_st is changed from non idle state to idle state. It means that SPI_CS raises high. 0: Others
  • SPI_MEM_SLV_ST_END_INT_RAW_W
    Field SPI_MEM_SLV_ST_END_INT_RAW writer - The raw bit for SPI_MEM_SLV_ST_END_INT interrupt. 1: Triggered when spi1_slv_st is changed from non idle state to idle state. It means that SPI_CS raises high. 0: Others
  • SPI_MEM_WPE_END_INT_RAW_R
    Field SPI_MEM_WPE_END_INT_RAW reader - The raw bit for SPI_MEM_WPE_END_INT interrupt. 1: Triggered when WRSR/PP/SE/BE/CE is sent and flash is already idle. 0: Others.
  • SPI_MEM_WPE_END_INT_RAW_W
    Field SPI_MEM_WPE_END_INT_RAW writer - The raw bit for SPI_MEM_WPE_END_INT interrupt. 1: Triggered when WRSR/PP/SE/BE/CE is sent and flash is already idle. 0: Others.
  • W
    Register SPI_MEM_INT_RAW writer