1#[repr(C)]
2#[cfg_attr(feature = "impl-register-debug", derive(Debug))]
3#[doc = "Register block"]
4pub struct RegisterBlock {
5 ep1: EP1,
6 ep1_conf: EP1_CONF,
7 int_raw: INT_RAW,
8 int_st: INT_ST,
9 int_ena: INT_ENA,
10 int_clr: INT_CLR,
11 conf0: CONF0,
12 test: TEST,
13 jfifo_st: JFIFO_ST,
14 fram_num: FRAM_NUM,
15 in_ep0_st: IN_EP0_ST,
16 in_ep1_st: IN_EP1_ST,
17 in_ep2_st: IN_EP2_ST,
18 in_ep3_st: IN_EP3_ST,
19 out_ep0_st: OUT_EP0_ST,
20 out_ep1_st: OUT_EP1_ST,
21 out_ep2_st: OUT_EP2_ST,
22 misc_conf: MISC_CONF,
23 mem_conf: MEM_CONF,
24 chip_rst: CHIP_RST,
25 set_line_code_w0: SET_LINE_CODE_W0,
26 set_line_code_w1: SET_LINE_CODE_W1,
27 get_line_code_w0: GET_LINE_CODE_W0,
28 get_line_code_w1: GET_LINE_CODE_W1,
29 config_update: CONFIG_UPDATE,
30 ser_afifo_config: SER_AFIFO_CONFIG,
31 bus_reset_st: BUS_RESET_ST,
32 _reserved27: [u8; 0x14],
33 date: DATE,
34}
35impl RegisterBlock {
36 #[doc = "0x00 - FIFO access for the CDC-ACM data IN and OUT endpoints."]
37 #[inline(always)]
38 pub const fn ep1(&self) -> &EP1 {
39 &self.ep1
40 }
41 #[doc = "0x04 - Configuration and control registers for the CDC-ACM FIFOs."]
42 #[inline(always)]
43 pub const fn ep1_conf(&self) -> &EP1_CONF {
44 &self.ep1_conf
45 }
46 #[doc = "0x08 - Interrupt raw status register."]
47 #[inline(always)]
48 pub const fn int_raw(&self) -> &INT_RAW {
49 &self.int_raw
50 }
51 #[doc = "0x0c - Interrupt status register."]
52 #[inline(always)]
53 pub const fn int_st(&self) -> &INT_ST {
54 &self.int_st
55 }
56 #[doc = "0x10 - Interrupt enable status register."]
57 #[inline(always)]
58 pub const fn int_ena(&self) -> &INT_ENA {
59 &self.int_ena
60 }
61 #[doc = "0x14 - Interrupt clear status register."]
62 #[inline(always)]
63 pub const fn int_clr(&self) -> &INT_CLR {
64 &self.int_clr
65 }
66 #[doc = "0x18 - PHY hardware configuration."]
67 #[inline(always)]
68 pub const fn conf0(&self) -> &CONF0 {
69 &self.conf0
70 }
71 #[doc = "0x1c - Registers used for debugging the PHY."]
72 #[inline(always)]
73 pub const fn test(&self) -> &TEST {
74 &self.test
75 }
76 #[doc = "0x20 - JTAG FIFO status and control registers."]
77 #[inline(always)]
78 pub const fn jfifo_st(&self) -> &JFIFO_ST {
79 &self.jfifo_st
80 }
81 #[doc = "0x24 - Last received SOF frame index register."]
82 #[inline(always)]
83 pub const fn fram_num(&self) -> &FRAM_NUM {
84 &self.fram_num
85 }
86 #[doc = "0x28 - Control IN endpoint status information."]
87 #[inline(always)]
88 pub const fn in_ep0_st(&self) -> &IN_EP0_ST {
89 &self.in_ep0_st
90 }
91 #[doc = "0x2c - CDC-ACM IN endpoint status information."]
92 #[inline(always)]
93 pub const fn in_ep1_st(&self) -> &IN_EP1_ST {
94 &self.in_ep1_st
95 }
96 #[doc = "0x30 - CDC-ACM interrupt IN endpoint status information."]
97 #[inline(always)]
98 pub const fn in_ep2_st(&self) -> &IN_EP2_ST {
99 &self.in_ep2_st
100 }
101 #[doc = "0x34 - JTAG IN endpoint status information."]
102 #[inline(always)]
103 pub const fn in_ep3_st(&self) -> &IN_EP3_ST {
104 &self.in_ep3_st
105 }
106 #[doc = "0x38 - Control OUT endpoint status information."]
107 #[inline(always)]
108 pub const fn out_ep0_st(&self) -> &OUT_EP0_ST {
109 &self.out_ep0_st
110 }
111 #[doc = "0x3c - CDC-ACM OUT endpoint status information."]
112 #[inline(always)]
113 pub const fn out_ep1_st(&self) -> &OUT_EP1_ST {
114 &self.out_ep1_st
115 }
116 #[doc = "0x40 - JTAG OUT endpoint status information."]
117 #[inline(always)]
118 pub const fn out_ep2_st(&self) -> &OUT_EP2_ST {
119 &self.out_ep2_st
120 }
121 #[doc = "0x44 - Clock enable control"]
122 #[inline(always)]
123 pub const fn misc_conf(&self) -> &MISC_CONF {
124 &self.misc_conf
125 }
126 #[doc = "0x48 - Memory power control"]
127 #[inline(always)]
128 pub const fn mem_conf(&self) -> &MEM_CONF {
129 &self.mem_conf
130 }
131 #[doc = "0x4c - CDC-ACM chip reset control."]
132 #[inline(always)]
133 pub const fn chip_rst(&self) -> &CHIP_RST {
134 &self.chip_rst
135 }
136 #[doc = "0x50 - W0 of SET_LINE_CODING command."]
137 #[inline(always)]
138 pub const fn set_line_code_w0(&self) -> &SET_LINE_CODE_W0 {
139 &self.set_line_code_w0
140 }
141 #[doc = "0x54 - W1 of SET_LINE_CODING command."]
142 #[inline(always)]
143 pub const fn set_line_code_w1(&self) -> &SET_LINE_CODE_W1 {
144 &self.set_line_code_w1
145 }
146 #[doc = "0x58 - W0 of GET_LINE_CODING command."]
147 #[inline(always)]
148 pub const fn get_line_code_w0(&self) -> &GET_LINE_CODE_W0 {
149 &self.get_line_code_w0
150 }
151 #[doc = "0x5c - W1 of GET_LINE_CODING command."]
152 #[inline(always)]
153 pub const fn get_line_code_w1(&self) -> &GET_LINE_CODE_W1 {
154 &self.get_line_code_w1
155 }
156 #[doc = "0x60 - Configuration registers' value update"]
157 #[inline(always)]
158 pub const fn config_update(&self) -> &CONFIG_UPDATE {
159 &self.config_update
160 }
161 #[doc = "0x64 - Serial AFIFO configure register"]
162 #[inline(always)]
163 pub const fn ser_afifo_config(&self) -> &SER_AFIFO_CONFIG {
164 &self.ser_afifo_config
165 }
166 #[doc = "0x68 - USB Bus reset status register"]
167 #[inline(always)]
168 pub const fn bus_reset_st(&self) -> &BUS_RESET_ST {
169 &self.bus_reset_st
170 }
171 #[doc = "0x80 - Date register"]
172 #[inline(always)]
173 pub const fn date(&self) -> &DATE {
174 &self.date
175 }
176}
177#[doc = "EP1 (rw) register accessor: FIFO access for the CDC-ACM data IN and OUT endpoints.\n\nYou can [`read`](crate::Reg::read) this register and get [`ep1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ep1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ep1`] module"]
178pub type EP1 = crate::Reg<ep1::EP1_SPEC>;
179#[doc = "FIFO access for the CDC-ACM data IN and OUT endpoints."]
180pub mod ep1;
181#[doc = "EP1_CONF (rw) register accessor: Configuration and control registers for the CDC-ACM FIFOs.\n\nYou can [`read`](crate::Reg::read) this register and get [`ep1_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ep1_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ep1_conf`] module"]
182pub type EP1_CONF = crate::Reg<ep1_conf::EP1_CONF_SPEC>;
183#[doc = "Configuration and control registers for the CDC-ACM FIFOs."]
184pub mod ep1_conf;
185#[doc = "INT_RAW (rw) register accessor: Interrupt raw status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_raw::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_raw::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_raw`] module"]
186pub type INT_RAW = crate::Reg<int_raw::INT_RAW_SPEC>;
187#[doc = "Interrupt raw status register."]
188pub mod int_raw;
189#[doc = "INT_ST (r) register accessor: Interrupt status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_st`] module"]
190pub type INT_ST = crate::Reg<int_st::INT_ST_SPEC>;
191#[doc = "Interrupt status register."]
192pub mod int_st;
193#[doc = "INT_ENA (rw) register accessor: Interrupt enable status register.\n\nYou can [`read`](crate::Reg::read) this register and get [`int_ena::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_ena::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_ena`] module"]
194pub type INT_ENA = crate::Reg<int_ena::INT_ENA_SPEC>;
195#[doc = "Interrupt enable status register."]
196pub mod int_ena;
197#[doc = "INT_CLR (w) register accessor: Interrupt clear status register.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`int_clr::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@int_clr`] module"]
198pub type INT_CLR = crate::Reg<int_clr::INT_CLR_SPEC>;
199#[doc = "Interrupt clear status register."]
200pub mod int_clr;
201#[doc = "CONF0 (rw) register accessor: PHY hardware configuration.\n\nYou can [`read`](crate::Reg::read) this register and get [`conf0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`conf0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@conf0`] module"]
202pub type CONF0 = crate::Reg<conf0::CONF0_SPEC>;
203#[doc = "PHY hardware configuration."]
204pub mod conf0;
205#[doc = "TEST (rw) register accessor: Registers used for debugging the PHY.\n\nYou can [`read`](crate::Reg::read) this register and get [`test::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`test::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@test`] module"]
206pub type TEST = crate::Reg<test::TEST_SPEC>;
207#[doc = "Registers used for debugging the PHY."]
208pub mod test;
209#[doc = "JFIFO_ST (rw) register accessor: JTAG FIFO status and control registers.\n\nYou can [`read`](crate::Reg::read) this register and get [`jfifo_st::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`jfifo_st::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@jfifo_st`] module"]
210pub type JFIFO_ST = crate::Reg<jfifo_st::JFIFO_ST_SPEC>;
211#[doc = "JTAG FIFO status and control registers."]
212pub mod jfifo_st;
213#[doc = "FRAM_NUM (r) register accessor: Last received SOF frame index register.\n\nYou can [`read`](crate::Reg::read) this register and get [`fram_num::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@fram_num`] module"]
214pub type FRAM_NUM = crate::Reg<fram_num::FRAM_NUM_SPEC>;
215#[doc = "Last received SOF frame index register."]
216pub mod fram_num;
217#[doc = "IN_EP0_ST (r) register accessor: Control IN endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep0_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_ep0_st`] module"]
218pub type IN_EP0_ST = crate::Reg<in_ep0_st::IN_EP0_ST_SPEC>;
219#[doc = "Control IN endpoint status information."]
220pub mod in_ep0_st;
221#[doc = "IN_EP1_ST (r) register accessor: CDC-ACM IN endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep1_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_ep1_st`] module"]
222pub type IN_EP1_ST = crate::Reg<in_ep1_st::IN_EP1_ST_SPEC>;
223#[doc = "CDC-ACM IN endpoint status information."]
224pub mod in_ep1_st;
225#[doc = "IN_EP2_ST (r) register accessor: CDC-ACM interrupt IN endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep2_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_ep2_st`] module"]
226pub type IN_EP2_ST = crate::Reg<in_ep2_st::IN_EP2_ST_SPEC>;
227#[doc = "CDC-ACM interrupt IN endpoint status information."]
228pub mod in_ep2_st;
229#[doc = "IN_EP3_ST (r) register accessor: JTAG IN endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`in_ep3_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@in_ep3_st`] module"]
230pub type IN_EP3_ST = crate::Reg<in_ep3_st::IN_EP3_ST_SPEC>;
231#[doc = "JTAG IN endpoint status information."]
232pub mod in_ep3_st;
233#[doc = "OUT_EP0_ST (r) register accessor: Control OUT endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep0_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_ep0_st`] module"]
234pub type OUT_EP0_ST = crate::Reg<out_ep0_st::OUT_EP0_ST_SPEC>;
235#[doc = "Control OUT endpoint status information."]
236pub mod out_ep0_st;
237#[doc = "OUT_EP1_ST (r) register accessor: CDC-ACM OUT endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep1_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_ep1_st`] module"]
238pub type OUT_EP1_ST = crate::Reg<out_ep1_st::OUT_EP1_ST_SPEC>;
239#[doc = "CDC-ACM OUT endpoint status information."]
240pub mod out_ep1_st;
241#[doc = "OUT_EP2_ST (r) register accessor: JTAG OUT endpoint status information.\n\nYou can [`read`](crate::Reg::read) this register and get [`out_ep2_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@out_ep2_st`] module"]
242pub type OUT_EP2_ST = crate::Reg<out_ep2_st::OUT_EP2_ST_SPEC>;
243#[doc = "JTAG OUT endpoint status information."]
244pub mod out_ep2_st;
245#[doc = "MISC_CONF (rw) register accessor: Clock enable control\n\nYou can [`read`](crate::Reg::read) this register and get [`misc_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`misc_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@misc_conf`] module"]
246pub type MISC_CONF = crate::Reg<misc_conf::MISC_CONF_SPEC>;
247#[doc = "Clock enable control"]
248pub mod misc_conf;
249#[doc = "MEM_CONF (rw) register accessor: Memory power control\n\nYou can [`read`](crate::Reg::read) this register and get [`mem_conf::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`mem_conf::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@mem_conf`] module"]
250pub type MEM_CONF = crate::Reg<mem_conf::MEM_CONF_SPEC>;
251#[doc = "Memory power control"]
252pub mod mem_conf;
253#[doc = "CHIP_RST (rw) register accessor: CDC-ACM chip reset control.\n\nYou can [`read`](crate::Reg::read) this register and get [`chip_rst::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`chip_rst::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@chip_rst`] module"]
254pub type CHIP_RST = crate::Reg<chip_rst::CHIP_RST_SPEC>;
255#[doc = "CDC-ACM chip reset control."]
256pub mod chip_rst;
257#[doc = "SET_LINE_CODE_W0 (r) register accessor: W0 of SET_LINE_CODING command.\n\nYou can [`read`](crate::Reg::read) this register and get [`set_line_code_w0::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@set_line_code_w0`] module"]
258pub type SET_LINE_CODE_W0 = crate::Reg<set_line_code_w0::SET_LINE_CODE_W0_SPEC>;
259#[doc = "W0 of SET_LINE_CODING command."]
260pub mod set_line_code_w0;
261#[doc = "SET_LINE_CODE_W1 (r) register accessor: W1 of SET_LINE_CODING command.\n\nYou can [`read`](crate::Reg::read) this register and get [`set_line_code_w1::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@set_line_code_w1`] module"]
262pub type SET_LINE_CODE_W1 = crate::Reg<set_line_code_w1::SET_LINE_CODE_W1_SPEC>;
263#[doc = "W1 of SET_LINE_CODING command."]
264pub mod set_line_code_w1;
265#[doc = "GET_LINE_CODE_W0 (rw) register accessor: W0 of GET_LINE_CODING command.\n\nYou can [`read`](crate::Reg::read) this register and get [`get_line_code_w0::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`get_line_code_w0::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@get_line_code_w0`] module"]
266pub type GET_LINE_CODE_W0 = crate::Reg<get_line_code_w0::GET_LINE_CODE_W0_SPEC>;
267#[doc = "W0 of GET_LINE_CODING command."]
268pub mod get_line_code_w0;
269#[doc = "GET_LINE_CODE_W1 (rw) register accessor: W1 of GET_LINE_CODING command.\n\nYou can [`read`](crate::Reg::read) this register and get [`get_line_code_w1::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`get_line_code_w1::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@get_line_code_w1`] module"]
270pub type GET_LINE_CODE_W1 = crate::Reg<get_line_code_w1::GET_LINE_CODE_W1_SPEC>;
271#[doc = "W1 of GET_LINE_CODING command."]
272pub mod get_line_code_w1;
273#[doc = "CONFIG_UPDATE (w) register accessor: Configuration registers' value update\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`config_update::W`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@config_update`] module"]
274pub type CONFIG_UPDATE = crate::Reg<config_update::CONFIG_UPDATE_SPEC>;
275#[doc = "Configuration registers' value update"]
276pub mod config_update;
277#[doc = "SER_AFIFO_CONFIG (rw) register accessor: Serial AFIFO configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`ser_afifo_config::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ser_afifo_config::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@ser_afifo_config`] module"]
278pub type SER_AFIFO_CONFIG = crate::Reg<ser_afifo_config::SER_AFIFO_CONFIG_SPEC>;
279#[doc = "Serial AFIFO configure register"]
280pub mod ser_afifo_config;
281#[doc = "BUS_RESET_ST (r) register accessor: USB Bus reset status register\n\nYou can [`read`](crate::Reg::read) this register and get [`bus_reset_st::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@bus_reset_st`] module"]
282pub type BUS_RESET_ST = crate::Reg<bus_reset_st::BUS_RESET_ST_SPEC>;
283#[doc = "USB Bus reset status register"]
284pub mod bus_reset_st;
285#[doc = "DATE (rw) register accessor: Date register\n\nYou can [`read`](crate::Reg::read) this register and get [`date::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`date::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@date`] module"]
286pub type DATE = crate::Reg<date::DATE_SPEC>;
287#[doc = "Date register"]
288pub mod date;