esp32h2/hp_sys/
hp_peri_timeout_conf.rs

1#[doc = "Register `HP_PERI_TIMEOUT_CONF` reader"]
2pub type R = crate::R<HP_PERI_TIMEOUT_CONF_SPEC>;
3#[doc = "Register `HP_PERI_TIMEOUT_CONF` writer"]
4pub type W = crate::W<HP_PERI_TIMEOUT_CONF_SPEC>;
5#[doc = "Field `HP_PERI_TIMEOUT_THRES` reader - Set the timeout threshold for bus access, corresponding to the number of clock cycles of the clock domain."]
6pub type HP_PERI_TIMEOUT_THRES_R = crate::FieldReader<u16>;
7#[doc = "Field `HP_PERI_TIMEOUT_THRES` writer - Set the timeout threshold for bus access, corresponding to the number of clock cycles of the clock domain."]
8pub type HP_PERI_TIMEOUT_THRES_W<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9#[doc = "Field `HP_PERI_TIMEOUT_INT_CLEAR` writer - Set this bit as 1 to clear timeout interrupt"]
10pub type HP_PERI_TIMEOUT_INT_CLEAR_W<'a, REG> = crate::BitWriter<'a, REG>;
11#[doc = "Field `HP_PERI_TIMEOUT_PROTECT_EN` reader - Set this bit as 1 to enable timeout protection for accessing hp peripheral registers"]
12pub type HP_PERI_TIMEOUT_PROTECT_EN_R = crate::BitReader;
13#[doc = "Field `HP_PERI_TIMEOUT_PROTECT_EN` writer - Set this bit as 1 to enable timeout protection for accessing hp peripheral registers"]
14pub type HP_PERI_TIMEOUT_PROTECT_EN_W<'a, REG> = crate::BitWriter<'a, REG>;
15impl R {
16    #[doc = "Bits 0:15 - Set the timeout threshold for bus access, corresponding to the number of clock cycles of the clock domain."]
17    #[inline(always)]
18    pub fn hp_peri_timeout_thres(&self) -> HP_PERI_TIMEOUT_THRES_R {
19        HP_PERI_TIMEOUT_THRES_R::new((self.bits & 0xffff) as u16)
20    }
21    #[doc = "Bit 17 - Set this bit as 1 to enable timeout protection for accessing hp peripheral registers"]
22    #[inline(always)]
23    pub fn hp_peri_timeout_protect_en(&self) -> HP_PERI_TIMEOUT_PROTECT_EN_R {
24        HP_PERI_TIMEOUT_PROTECT_EN_R::new(((self.bits >> 17) & 1) != 0)
25    }
26}
27#[cfg(feature = "impl-register-debug")]
28impl core::fmt::Debug for R {
29    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
30        f.debug_struct("HP_PERI_TIMEOUT_CONF")
31            .field("hp_peri_timeout_thres", &self.hp_peri_timeout_thres())
32            .field(
33                "hp_peri_timeout_protect_en",
34                &self.hp_peri_timeout_protect_en(),
35            )
36            .finish()
37    }
38}
39impl W {
40    #[doc = "Bits 0:15 - Set the timeout threshold for bus access, corresponding to the number of clock cycles of the clock domain."]
41    #[inline(always)]
42    pub fn hp_peri_timeout_thres(&mut self) -> HP_PERI_TIMEOUT_THRES_W<HP_PERI_TIMEOUT_CONF_SPEC> {
43        HP_PERI_TIMEOUT_THRES_W::new(self, 0)
44    }
45    #[doc = "Bit 16 - Set this bit as 1 to clear timeout interrupt"]
46    #[inline(always)]
47    pub fn hp_peri_timeout_int_clear(
48        &mut self,
49    ) -> HP_PERI_TIMEOUT_INT_CLEAR_W<HP_PERI_TIMEOUT_CONF_SPEC> {
50        HP_PERI_TIMEOUT_INT_CLEAR_W::new(self, 16)
51    }
52    #[doc = "Bit 17 - Set this bit as 1 to enable timeout protection for accessing hp peripheral registers"]
53    #[inline(always)]
54    pub fn hp_peri_timeout_protect_en(
55        &mut self,
56    ) -> HP_PERI_TIMEOUT_PROTECT_EN_W<HP_PERI_TIMEOUT_CONF_SPEC> {
57        HP_PERI_TIMEOUT_PROTECT_EN_W::new(self, 17)
58    }
59}
60#[doc = "HP_PERI_TIMEOUT configuration register\n\nYou can [`read`](crate::Reg::read) this register and get [`hp_peri_timeout_conf::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`hp_peri_timeout_conf::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct HP_PERI_TIMEOUT_CONF_SPEC;
62impl crate::RegisterSpec for HP_PERI_TIMEOUT_CONF_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`hp_peri_timeout_conf::R`](R) reader structure"]
66impl crate::Readable for HP_PERI_TIMEOUT_CONF_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`hp_peri_timeout_conf::W`](W) writer structure"]
68impl crate::Writable for HP_PERI_TIMEOUT_CONF_SPEC {
69    type Safety = crate::Unsafe;
70}
71#[doc = "`reset()` method sets HP_PERI_TIMEOUT_CONF to value 0x0002_ffff"]
72impl crate::Resettable for HP_PERI_TIMEOUT_CONF_SPEC {
73    const RESET_VALUE: u32 = 0x0002_ffff;
74}
esp32h2/hp_sys/hp_peri_timeout_conf.rs

esp32h2/hp_sys/
hp_peri_timeout_conf.rs
