esp32h2/apb_saradc/
tsens_ctrl2.rs

1#[doc = "Register `TSENS_CTRL2` reader"]
2pub type R = crate::R<TSENS_CTRL2_SPEC>;
3#[doc = "Register `TSENS_CTRL2` writer"]
4pub type W = crate::W<TSENS_CTRL2_SPEC>;
5#[doc = "Field `XPD_WAIT` reader - the time that power up tsens need wait"]
6pub type XPD_WAIT_R = crate::FieldReader<u16>;
7#[doc = "Field `XPD_WAIT` writer - the time that power up tsens need wait"]
8pub type XPD_WAIT_W<'a, REG> = crate::FieldWriter<'a, REG, 12, u16>;
9#[doc = "Field `XPD_FORCE` reader - force power up tsens"]
10pub type XPD_FORCE_R = crate::FieldReader;
11#[doc = "Field `XPD_FORCE` writer - force power up tsens"]
12pub type XPD_FORCE_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
13#[doc = "Field `CLK_INV` reader - inv tsens clk"]
14pub type CLK_INV_R = crate::BitReader;
15#[doc = "Field `CLK_INV` writer - inv tsens clk"]
16pub type CLK_INV_W<'a, REG> = crate::BitWriter<'a, REG>;
17#[doc = "Field `CLK_SEL` reader - tsens clk select"]
18pub type CLK_SEL_R = crate::BitReader;
19#[doc = "Field `CLK_SEL` writer - tsens clk select"]
20pub type CLK_SEL_W<'a, REG> = crate::BitWriter<'a, REG>;
21impl R {
22    #[doc = "Bits 0:11 - the time that power up tsens need wait"]
23    #[inline(always)]
24    pub fn xpd_wait(&self) -> XPD_WAIT_R {
25        XPD_WAIT_R::new((self.bits & 0x0fff) as u16)
26    }
27    #[doc = "Bits 12:13 - force power up tsens"]
28    #[inline(always)]
29    pub fn xpd_force(&self) -> XPD_FORCE_R {
30        XPD_FORCE_R::new(((self.bits >> 12) & 3) as u8)
31    }
32    #[doc = "Bit 14 - inv tsens clk"]
33    #[inline(always)]
34    pub fn clk_inv(&self) -> CLK_INV_R {
35        CLK_INV_R::new(((self.bits >> 14) & 1) != 0)
36    }
37    #[doc = "Bit 15 - tsens clk select"]
38    #[inline(always)]
39    pub fn clk_sel(&self) -> CLK_SEL_R {
40        CLK_SEL_R::new(((self.bits >> 15) & 1) != 0)
41    }
42}
43#[cfg(feature = "impl-register-debug")]
44impl core::fmt::Debug for R {
45    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
46        f.debug_struct("TSENS_CTRL2")
47            .field("xpd_wait", &self.xpd_wait())
48            .field("xpd_force", &self.xpd_force())
49            .field("clk_inv", &self.clk_inv())
50            .field("clk_sel", &self.clk_sel())
51            .finish()
52    }
53}
54impl W {
55    #[doc = "Bits 0:11 - the time that power up tsens need wait"]
56    #[inline(always)]
57    pub fn xpd_wait(&mut self) -> XPD_WAIT_W<TSENS_CTRL2_SPEC> {
58        XPD_WAIT_W::new(self, 0)
59    }
60    #[doc = "Bits 12:13 - force power up tsens"]
61    #[inline(always)]
62    pub fn xpd_force(&mut self) -> XPD_FORCE_W<TSENS_CTRL2_SPEC> {
63        XPD_FORCE_W::new(self, 12)
64    }
65    #[doc = "Bit 14 - inv tsens clk"]
66    #[inline(always)]
67    pub fn clk_inv(&mut self) -> CLK_INV_W<TSENS_CTRL2_SPEC> {
68        CLK_INV_W::new(self, 14)
69    }
70    #[doc = "Bit 15 - tsens clk select"]
71    #[inline(always)]
72    pub fn clk_sel(&mut self) -> CLK_SEL_W<TSENS_CTRL2_SPEC> {
73        CLK_SEL_W::new(self, 15)
74    }
75}
76#[doc = "digital tsens configure register\n\nYou can [`read`](crate::Reg::read) this register and get [`tsens_ctrl2::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`tsens_ctrl2::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
77pub struct TSENS_CTRL2_SPEC;
78impl crate::RegisterSpec for TSENS_CTRL2_SPEC {
79    type Ux = u32;
80}
81#[doc = "`read()` method returns [`tsens_ctrl2::R`](R) reader structure"]
82impl crate::Readable for TSENS_CTRL2_SPEC {}
83#[doc = "`write(|w| ..)` method takes [`tsens_ctrl2::W`](W) writer structure"]
84impl crate::Writable for TSENS_CTRL2_SPEC {
85    type Safety = crate::Unsafe;
86}
87#[doc = "`reset()` method sets TSENS_CTRL2 to value 0x4002"]
88impl crate::Resettable for TSENS_CTRL2_SPEC {
89    const RESET_VALUE: u32 = 0x4002;
90}
esp32h2/apb_saradc/tsens_ctrl2.rs

esp32h2/apb_saradc/
tsens_ctrl2.rs
