esp32h2/trace/
trigger.rs

1#[doc = "Register `TRIGGER` reader"]
2pub type R = crate::R<TRIGGER_SPEC>;
3#[doc = "Register `TRIGGER` writer"]
4pub type W = crate::W<TRIGGER_SPEC>;
5#[doc = "Field `ON` writer - 0\\] set 1 start trace."]
6pub type ON_W<'a, REG> = crate::BitWriter<'a, REG>;
7#[doc = "Field `OFF` writer - set 1 stop trace."]
8pub type OFF_W<'a, REG> = crate::BitWriter<'a, REG>;
9#[doc = "Field `MEM_LOOP` reader - if this reg is 1, trace will loop wrtie trace_mem. If is 0, when mem_current_addr at mem_end_addr, it will stop at the mem_end_addr"]
10pub type MEM_LOOP_R = crate::BitReader;
11#[doc = "Field `MEM_LOOP` writer - if this reg is 1, trace will loop wrtie trace_mem. If is 0, when mem_current_addr at mem_end_addr, it will stop at the mem_end_addr"]
12pub type MEM_LOOP_W<'a, REG> = crate::BitWriter<'a, REG>;
13#[doc = "Field `RESTART_ENA` reader - enable encoder auto-restart, when lost package, the encoder will end, if enable auto-restart, when fifo empty, encoder will restart and send a sync package."]
14pub type RESTART_ENA_R = crate::BitReader;
15#[doc = "Field `RESTART_ENA` writer - enable encoder auto-restart, when lost package, the encoder will end, if enable auto-restart, when fifo empty, encoder will restart and send a sync package."]
16pub type RESTART_ENA_W<'a, REG> = crate::BitWriter<'a, REG>;
17impl R {
18    #[doc = "Bit 2 - if this reg is 1, trace will loop wrtie trace_mem. If is 0, when mem_current_addr at mem_end_addr, it will stop at the mem_end_addr"]
19    #[inline(always)]
20    pub fn mem_loop(&self) -> MEM_LOOP_R {
21        MEM_LOOP_R::new(((self.bits >> 2) & 1) != 0)
22    }
23    #[doc = "Bit 3 - enable encoder auto-restart, when lost package, the encoder will end, if enable auto-restart, when fifo empty, encoder will restart and send a sync package."]
24    #[inline(always)]
25    pub fn restart_ena(&self) -> RESTART_ENA_R {
26        RESTART_ENA_R::new(((self.bits >> 3) & 1) != 0)
27    }
28}
29#[cfg(feature = "impl-register-debug")]
30impl core::fmt::Debug for R {
31    fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
32        f.debug_struct("TRIGGER")
33            .field("mem_loop", &self.mem_loop())
34            .field("restart_ena", &self.restart_ena())
35            .finish()
36    }
37}
38impl W {
39    #[doc = "Bit 0 - 0\\] set 1 start trace."]
40    #[inline(always)]
41    pub fn on(&mut self) -> ON_W<TRIGGER_SPEC> {
42        ON_W::new(self, 0)
43    }
44    #[doc = "Bit 1 - set 1 stop trace."]
45    #[inline(always)]
46    pub fn off(&mut self) -> OFF_W<TRIGGER_SPEC> {
47        OFF_W::new(self, 1)
48    }
49    #[doc = "Bit 2 - if this reg is 1, trace will loop wrtie trace_mem. If is 0, when mem_current_addr at mem_end_addr, it will stop at the mem_end_addr"]
50    #[inline(always)]
51    pub fn mem_loop(&mut self) -> MEM_LOOP_W<TRIGGER_SPEC> {
52        MEM_LOOP_W::new(self, 2)
53    }
54    #[doc = "Bit 3 - enable encoder auto-restart, when lost package, the encoder will end, if enable auto-restart, when fifo empty, encoder will restart and send a sync package."]
55    #[inline(always)]
56    pub fn restart_ena(&mut self) -> RESTART_ENA_W<TRIGGER_SPEC> {
57        RESTART_ENA_W::new(self, 3)
58    }
59}
60#[doc = "trigger register\n\nYou can [`read`](crate::Reg::read) this register and get [`trigger::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`trigger::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
61pub struct TRIGGER_SPEC;
62impl crate::RegisterSpec for TRIGGER_SPEC {
63    type Ux = u32;
64}
65#[doc = "`read()` method returns [`trigger::R`](R) reader structure"]
66impl crate::Readable for TRIGGER_SPEC {}
67#[doc = "`write(|w| ..)` method takes [`trigger::W`](W) writer structure"]
68impl crate::Writable for TRIGGER_SPEC {
69    type Safety = crate::Unsafe;
70}
71#[doc = "`reset()` method sets TRIGGER to value 0x0c"]
72impl crate::Resettable for TRIGGER_SPEC {
73    const RESET_VALUE: u32 = 0x0c;
74}