Module ctrl

SPI0 control register.

Structs

CTRL_SPEC

SPI0 control register.

Type Aliases

DATA_IE_ALWAYS_ON_R

Field DATA_IE_ALWAYS_ON reader - When accesses to flash, 1: the IE signals of pads connected to SPI_IO[7:0] are always 1. 0: Others.

DATA_IE_ALWAYS_ON_W

Field DATA_IE_ALWAYS_ON writer - When accesses to flash, 1: the IE signals of pads connected to SPI_IO[7:0] are always 1. 0: Others.

DQS_IE_ALWAYS_ON_R

Field DQS_IE_ALWAYS_ON reader - When accesses to flash, 1: the IE signals of pads connected to SPI_DQS are always 1. 0: Others.

D_POL_R

Field D_POL reader - The bit is used to set MOSI line polarity, 1: high 0, low

D_POL_W

Field D_POL writer - The bit is used to set MOSI line polarity, 1: high 0, low

FADDR_OCT_R

Field FADDR_OCT reader - Apply 8 signals during address phase 1:enable 0: disable

FASTRD_MODE_R

Field FASTRD_MODE reader - This bit enable the bits: SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QOUT and SPI_MEM_FREAD_DOUT. 1: enable 0: disable.

FASTRD_MODE_W

Field FASTRD_MODE writer - This bit enable the bits: SPI_MEM_FREAD_QIO, SPI_MEM_FREAD_DIO, SPI_MEM_FREAD_QOUT and SPI_MEM_FREAD_DOUT. 1: enable 0: disable.

FCMD_OCT_R

Field FCMD_OCT reader - Apply 8 signals during command phase 1:enable 0: disable

FCMD_QUAD_R

Field FCMD_QUAD reader - Apply 4 signals during command phase 1:enable 0: disable

FCMD_QUAD_W

Field FCMD_QUAD writer - Apply 4 signals during command phase 1:enable 0: disable

FDIN_OCT_R

Field FDIN_OCT reader - Apply 8 signals during read-data phase 1:enable 0: disable

FDOUT_OCT_R

Field FDOUT_OCT reader - Apply 8 signals during write-data phase 1:enable 0: disable

FDUMMY_RIN_R

Field FDUMMY_RIN reader - In an MSPI read data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller in the first half part of dummy phase. It is used to mask invalid SPI_DQS in the half part of dummy phase.

FDUMMY_RIN_W

Field FDUMMY_RIN writer - In an MSPI read data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller in the first half part of dummy phase. It is used to mask invalid SPI_DQS in the half part of dummy phase.

FDUMMY_WOUT_R

Field FDUMMY_WOUT reader - In an MSPI write data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller in the second half part of dummy phase. It is used to pre-drive flash.

FDUMMY_WOUT_W

Field FDUMMY_WOUT writer - In an MSPI write data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller in the second half part of dummy phase. It is used to pre-drive flash.

FREAD_DIO_R

Field FREAD_DIO reader - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.

FREAD_DIO_W

Field FREAD_DIO writer - In the read operations address phase and read-data phase apply 2 signals. 1: enable 0: disable.

FREAD_DUAL_R

Field FREAD_DUAL reader - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable.

FREAD_DUAL_W

Field FREAD_DUAL writer - In the read operations, read-data phase apply 2 signals. 1: enable 0: disable.

FREAD_QIO_R

Field FREAD_QIO reader - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.

FREAD_QIO_W

Field FREAD_QIO writer - In the read operations address phase and read-data phase apply 4 signals. 1: enable 0: disable.

FREAD_QUAD_R

Field FREAD_QUAD reader - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.

FREAD_QUAD_W

Field FREAD_QUAD writer - In the read operations read-data phase apply 4 signals. 1: enable 0: disable.

Q_POL_R

Field Q_POL reader - The bit is used to set MISO line polarity, 1: high 0, low

Q_POL_W

Field Q_POL writer - The bit is used to set MISO line polarity, 1: high 0, low

R

Register CTRL reader

W

Register CTRL writer

WDUMMY_ALWAYS_OUT_R

Field WDUMMY_ALWAYS_OUT reader - In the dummy phase of an MSPI write data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller.

WDUMMY_ALWAYS_OUT_W

Field WDUMMY_ALWAYS_OUT writer - In the dummy phase of an MSPI write data transfer when accesses to flash, the level of SPI_IO[7:0] is output by the MSPI controller.

WDUMMY_DQS_ALWAYS_OUT_R

Field WDUMMY_DQS_ALWAYS_OUT reader - In the dummy phase of an MSPI write data transfer when accesses to flash, the level of SPI_DQS is output by the MSPI controller.

WP_R

Field WP reader - Write protect signal output when SPI is idle. 1: output high, 0: output low.

WP_W

Field WP writer - Write protect signal output when SPI is idle. 1: output high, 0: output low.