Module esp32h2::spi0

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Expand description

SPI (Serial Peripheral Interface) Controller 0

Modules§

Structs§

Type Aliases§

  • AXI_ERR_ADDR
    AXI_ERR_ADDR (r) register accessor: SPI0 AXI request error address.
  • CACHE_FCTRL
    CACHE_FCTRL (rw) register accessor: SPI0 bit mode control register.
  • CACHE_SCTRL
    CACHE_SCTRL (r) register accessor: SPI0 external RAM control register
  • CLOCK
    CLOCK (rw) register accessor: SPI clock division control register.
  • CLOCK_GATE
    CLOCK_GATE (rw) register accessor: SPI0 clock gate register
  • CMD
    CMD (r) register accessor: SPI0 FSM status register
  • CTRL
    CTRL (rw) register accessor: SPI0 control register.
  • CTRL1
    CTRL1 (rw) register accessor: SPI0 control1 register.
  • CTRL2
    CTRL2 (rw) register accessor: SPI0 control2 register.
  • DATE
    DATE (rw) register accessor: SPI0 version control register
  • DDR
    DDR (r) register accessor: SPI0 flash DDR mode control register
  • DIN_MODE
    DIN_MODE (rw) register accessor: MSPI flash input timing delay mode control register
  • DIN_NUM
    DIN_NUM (rw) register accessor: MSPI flash input timing delay number control register
  • DOUT_MODE
    DOUT_MODE (rw) register accessor: MSPI flash output timing adjustment control register
  • DPA_CTRL
    DPA_CTRL (rw) register accessor: SPI memory cryption DPA register
  • ECC_CTRL
    ECC_CTRL (rw) register accessor: MSPI ECC control register
  • ECC_ERR_ADDR
    ECC_ERR_ADDR (r) register accessor: MSPI ECC error address register
  • FSM
    FSM (rw) register accessor: SPI0 FSM status register
  • INT_CLR
    INT_CLR (rw) register accessor: SPI0 interrupt clear register
  • INT_ENA
    INT_ENA (rw) register accessor: SPI0 interrupt enable register
  • INT_RAW
    INT_RAW (rw) register accessor: SPI0 interrupt raw register
  • INT_ST
    INT_ST (r) register accessor: SPI0 interrupt status register
  • MISC
    MISC (rw) register accessor: SPI0 misc register
  • MMU_ITEM_CONTENT
    MMU_ITEM_CONTENT (rw) register accessor: MSPI-MMU item content register
  • MMU_ITEM_INDEX
    MMU_ITEM_INDEX (rw) register accessor: MSPI-MMU item index register
  • MMU_POWER_CTRL
    MMU_POWER_CTRL (rw) register accessor: MSPI MMU power control register
  • PMS_REJECT
    PMS_REJECT (rw) register accessor: SPI1 access reject register
  • RD_STATUS
    RD_STATUS (rw) register accessor: SPI0 read control register.
  • REGISTERRND_ECO_HIGH
    REGISTERRND_ECO_HIGH (r) register accessor: MSPI ECO high register
  • REGISTERRND_ECO_LOW
    REGISTERRND_ECO_LOW (r) register accessor: MSPI ECO low register
  • SPI_FMEM_PMS_ADDR
    SPI_FMEM_PMS_ADDR (rw) register accessor: SPI1 flash ACE section %s start address register
  • SPI_FMEM_PMS_ATTR
    SPI_FMEM_PMS_ATTR (rw) register accessor: MSPI flash ACE section %s attribute register
  • SPI_FMEM_PMS_SIZE
    SPI_FMEM_PMS_SIZE (rw) register accessor: SPI1 flash ACE section %s start address register
  • SPI_SMEM_AC
    SPI_SMEM_AC (r) register accessor: MSPI external RAM ECC and SPI CS timing control register
  • SPI_SMEM_DDR
    SPI_SMEM_DDR (r) register accessor: SPI0 external RAM DDR mode control register
  • SPI_SMEM_DIN_MODE
    SPI_SMEM_DIN_MODE (r) register accessor: MSPI external RAM input timing delay mode control register
  • SPI_SMEM_DIN_NUM
    SPI_SMEM_DIN_NUM (r) register accessor: MSPI external RAM input timing delay number control register
  • SPI_SMEM_DOUT_MODE
    SPI_SMEM_DOUT_MODE (r) register accessor: MSPI external RAM output timing adjustment control register
  • SPI_SMEM_ECC_CTRL
    SPI_SMEM_ECC_CTRL (r) register accessor: MSPI ECC control register
  • SPI_SMEM_PMS_ADDR
    SPI_SMEM_PMS_ADDR (rw) register accessor: SPI1 external RAM ACE section %s start address register
  • SPI_SMEM_PMS_ATTR
    SPI_SMEM_PMS_ATTR (rw) register accessor: SPI1 flash ACE section %s start address register
  • SPI_SMEM_PMS_SIZE
    SPI_SMEM_PMS_SIZE (rw) register accessor: SPI1 external RAM ACE section %s start address register
  • SPI_SMEM_TIMING_CALI
    SPI_SMEM_TIMING_CALI (r) register accessor: MSPI external RAM timing calibration register
  • SRAM_CLK
    SRAM_CLK (r) register accessor: SPI0 external RAM clock control register
  • SRAM_CMD
    SRAM_CMD (rw) register accessor: SPI0 external RAM mode control register
  • SRAM_DRD_CMD
    SRAM_DRD_CMD (r) register accessor: SPI0 external RAM DDR read command control register
  • SRAM_DWR_CMD
    SRAM_DWR_CMD (r) register accessor: SPI0 external RAM DDR write command control register
  • TIMING_CALI
    TIMING_CALI (rw) register accessor: SPI0 flash timing calibration register
  • USER
    USER (rw) register accessor: SPI0 user register.
  • USER1
    USER1 (rw) register accessor: SPI0 user1 register.
  • USER2
    USER2 (rw) register accessor: SPI0 user2 register.
  • XTS_DATE
    XTS_DATE (rw) register accessor: Manual Encryption version register
  • XTS_DESTINATION
    XTS_DESTINATION (rw) register accessor: Manual Encryption destination register
  • XTS_DESTROY
    XTS_DESTROY (w) register accessor: Manual Encryption physical address register
  • XTS_LINESIZE
    XTS_LINESIZE (rw) register accessor: Manual Encryption Line-Size register
  • XTS_PHYSICAL_ADDRESS
    XTS_PHYSICAL_ADDRESS (rw) register accessor: Manual Encryption physical address register
  • XTS_PLAIN_BASE
    XTS_PLAIN_BASE (rw) register accessor: The base address of the memory that stores plaintext in Manual Encryption
  • XTS_RELEASE
    XTS_RELEASE (w) register accessor: Manual Encryption physical address register
  • XTS_STATE
    XTS_STATE (r) register accessor: Manual Encryption physical address register
  • XTS_TRIGGER
    XTS_TRIGGER (w) register accessor: Manual Encryption physical address register