Module esp32h2::uart0::int_raw

source ·
Expand description

Raw interrupt status

Structs§

Type Aliases§

  • Field AT_CMD_CHAR_DET reader - This interrupt raw bit turns to high level when receiver detects the configured at_cmd char.
  • Field AT_CMD_CHAR_DET writer - This interrupt raw bit turns to high level when receiver detects the configured at_cmd char.
  • Field BRK_DET reader - This interrupt raw bit turns to high level when receiver detects a 0 after the stop bit.
  • Field BRK_DET writer - This interrupt raw bit turns to high level when receiver detects a 0 after the stop bit.
  • Field CTS_CHG reader - This interrupt raw bit turns to high level when receiver detects the edge change of CTSn signal.
  • Field CTS_CHG writer - This interrupt raw bit turns to high level when receiver detects the edge change of CTSn signal.
  • Field DSR_CHG reader - This interrupt raw bit turns to high level when receiver detects the edge change of DSRn signal.
  • Field DSR_CHG writer - This interrupt raw bit turns to high level when receiver detects the edge change of DSRn signal.
  • Field FRM_ERR reader - This interrupt raw bit turns to high level when receiver detects a data frame error .
  • Field FRM_ERR writer - This interrupt raw bit turns to high level when receiver detects a data frame error .
  • Field GLITCH_DET reader - This interrupt raw bit turns to high level when receiver detects a glitch in the middle of a start bit.
  • Field GLITCH_DET writer - This interrupt raw bit turns to high level when receiver detects a glitch in the middle of a start bit.
  • Field PARITY_ERR reader - This interrupt raw bit turns to high level when receiver detects a parity error in the data.
  • Field PARITY_ERR writer - This interrupt raw bit turns to high level when receiver detects a parity error in the data.
  • Register INT_RAW reader
  • Field RS485_CLASH reader - This interrupt raw bit turns to high level when detects a clash between transmitter and receiver in rs485 mode.
  • Field RS485_CLASH writer - This interrupt raw bit turns to high level when detects a clash between transmitter and receiver in rs485 mode.
  • Field RS485_FRM_ERR reader - This interrupt raw bit turns to high level when receiver detects a data frame error from the echo of transmitter in rs485 mode.
  • Field RS485_FRM_ERR writer - This interrupt raw bit turns to high level when receiver detects a data frame error from the echo of transmitter in rs485 mode.
  • Field RS485_PARITY_ERR reader - This interrupt raw bit turns to high level when receiver detects a parity error from the echo of transmitter in rs485 mode.
  • Field RS485_PARITY_ERR writer - This interrupt raw bit turns to high level when receiver detects a parity error from the echo of transmitter in rs485 mode.
  • Field RXFIFO_FULL reader - This interrupt raw bit turns to high level when receiver receives more data than what rxfifo_full_thrhd specifies.
  • Field RXFIFO_FULL writer - This interrupt raw bit turns to high level when receiver receives more data than what rxfifo_full_thrhd specifies.
  • Field RXFIFO_OVF reader - This interrupt raw bit turns to high level when receiver receives more data than the FIFO can store.
  • Field RXFIFO_OVF writer - This interrupt raw bit turns to high level when receiver receives more data than the FIFO can store.
  • Field RXFIFO_TOUT reader - This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.
  • Field RXFIFO_TOUT writer - This interrupt raw bit turns to high level when receiver takes more time than rx_tout_thrhd to receive a byte.
  • Field SW_XOFF reader - This interrupt raw bit turns to high level when receiver receives Xoff char when uart_sw_flow_con_en is set to 1.
  • Field SW_XOFF writer - This interrupt raw bit turns to high level when receiver receives Xoff char when uart_sw_flow_con_en is set to 1.
  • Field SW_XON reader - This interrupt raw bit turns to high level when receiver recevies Xon char when uart_sw_flow_con_en is set to 1.
  • Field SW_XON writer - This interrupt raw bit turns to high level when receiver recevies Xon char when uart_sw_flow_con_en is set to 1.
  • Field TXFIFO_EMPTY reader - This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is less than what txfifo_empty_thrhd specifies .
  • Field TXFIFO_EMPTY writer - This interrupt raw bit turns to high level when the amount of data in Tx-FIFO is less than what txfifo_empty_thrhd specifies .
  • Field TX_BRK_DONE reader - This interrupt raw bit turns to high level when transmitter completes sending NULL characters after all data in Tx-FIFO are sent.
  • Field TX_BRK_DONE writer - This interrupt raw bit turns to high level when transmitter completes sending NULL characters after all data in Tx-FIFO are sent.
  • Field TX_BRK_IDLE_DONE reader - This interrupt raw bit turns to high level when transmitter has kept the shortest duration after sending the last data.
  • Field TX_BRK_IDLE_DONE writer - This interrupt raw bit turns to high level when transmitter has kept the shortest duration after sending the last data.
  • Field TX_DONE reader - This interrupt raw bit turns to high level when transmitter has send out all data in FIFO.
  • Field TX_DONE writer - This interrupt raw bit turns to high level when transmitter has send out all data in FIFO.
  • Register INT_RAW writer
  • Field WAKEUP reader - This interrupt raw bit turns to high level when input rxd edge changes more times than what reg_active_threshold specifies in light sleeping mode.
  • Field WAKEUP writer - This interrupt raw bit turns to high level when input rxd edge changes more times than what reg_active_threshold specifies in light sleeping mode.